Received: by 2002:a05:6a10:c7c6:0:0:0:0 with SMTP id h6csp1632215pxy; Mon, 2 Aug 2021 06:40:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyTrxy4CBE7TgwRrMKVZQJiFSGBQoLl8X/mA5/v6zA0N9f8oELg6k0qlMDnXH1Py8xCGpBt X-Received: by 2002:a02:cce6:: with SMTP id l6mr15013013jaq.114.1627911634786; Mon, 02 Aug 2021 06:40:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627911634; cv=none; d=google.com; s=arc-20160816; b=vUeFoSx7skR1apqQGfW52XRkbssTCTPKhfbDe18kOCkcw7j3XHHV5rJ5viblig6PR4 6zAhf73LIp7F3fp09VNvbI167pO+HKK6IIeNaSnt8mxvj8zpXbwJDaPzFvZ0gz+YsRkm WJhSBtu3JQmlNzw8kqRJvIqoQW6bbB3qDfXy/BC4dQq1HRAMphId75b99S4WxrNFkrp4 Oi1DzRr2dAvcImEF1lHbhgBIHtjk0jrXE1cfzQ1hAqiAz1Y/eR9CZ1ViaT1AN+VvsO8D OQX6wkkZjAM5069s/hglCaWIKFhQHjTUZzETq9IN5ijBMXj2+Ei9qRZnTujcKzleuPZG 2J3g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=5lw41H6w70pZFPZYn804ztO37u1ine6njh7Mo1mlvr8=; b=MF5c0H+CbmEPFwjWvIp8DP0vYMt5HlphRMNrdgtWT7JfIOU2Xb901fa/mEMFFJMo+o 9ixN1I2wgWnPGm7sIfD9R+J7g0zdk5w97UJoVVLBoPXXiZT3tGOnB3zByMxHIoyNIHac JC2K4Yc3BEBaIUVde3aDVOsQYxs/3LMZD0+DuJmZltzY474RvNPq8AiPhb0fsMah3hfb INFi/ap9AdqARH8rhdc3cw2dk6huC2auQVWcRHP1tuYEeFjc+858Eb+yDJ7A6zTWFMMO 4OcwsLyapGG3v19NPTI16XtPhXPO5oOIw26anLiBDB4V2wcaNt5C48dG+vDpSnxrBUk/ qDNg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=Ik5YqngM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id g13si14899034iow.65.2021.08.02.06.40.23; Mon, 02 Aug 2021 06:40:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=Ik5YqngM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233963AbhHBNjl (ORCPT + 99 others); Mon, 2 Aug 2021 09:39:41 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:57220 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233719AbhHBNjk (ORCPT ); Mon, 2 Aug 2021 09:39:40 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=5lw41H6w70pZFPZYn804ztO37u1ine6njh7Mo1mlvr8=; b=Ik5YqngM3Pu8FIsibgGI90LXCE /MbmLCGpkr20VvijZkNxPwyjDhC82eFgOjL0CuRmQQEbKBSaMfKmEtEJ52MTI2YiRMe/O1M1BA4Qz rtNMwAGJTST96S/bLC7mu0acx88lcVBdMFAiArFPcR5+11vN2tc1dRMVMW7AmAgp6cRQ=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1mAYA9-00FpNJ-7T; Mon, 02 Aug 2021 15:39:25 +0200 Date: Mon, 2 Aug 2021 15:39:25 +0200 From: Andrew Lunn To: luoj@codeaurora.org Cc: Rob Herring , Heiner Kallweit , David Miller , Jakub Kicinski , Philipp Zabel , "Gross, Andy" , Bjorn Andersson , Robert Marko , netdev , linux-kernel@vger.kernel.org, linux-arm-msm , devicetree@vger.kernel.org, Sricharan Subject: Re: [PATCH 3/3] dt-bindings: net: rename Qualcomm IPQ MDIO bindings Message-ID: References: <20210729125358.5227-1-luoj@codeaurora.org> <20210729125358.5227-3-luoj@codeaurora.org> <7873e70dcf4fe749521bd9c985571742@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <7873e70dcf4fe749521bd9c985571742@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > > since the phylib code can't satisfy resetting PHY in IPQ chipset, phylib > > resets phy by > > configuring GPIO output value to 1, then to 0. however the PHY reset in > > IPQ chipset need > > to configuring GPIO output value to 0, then to 1 for the PHY reset, so i > > put the phy-reset-gpios here. Look at the active low DT property of a GPIO. Andrew