Received: by 2002:a05:6a10:c7c6:0:0:0:0 with SMTP id h6csp1698081pxy; Mon, 2 Aug 2021 08:08:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz551q+aZoaVb9dx1Qr/4+pbfv9Pt1IOFerWBGBAWh76niG0Uw19mjqAz9i9IMVTjVRq2lG X-Received: by 2002:a5d:4a85:: with SMTP id o5mr18049910wrq.67.1627916893082; Mon, 02 Aug 2021 08:08:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627916893; cv=none; d=google.com; s=arc-20160816; b=HO/sDT7/EhG0yzzuJIh9SSzksHg5BYlnSyqboiFjGb6KwDhCXNCrIN6Cels9inUA31 2Ds+6DsQYFdG/dkGTK5cXPlp5olIyPrhrkmtp6LucEeeukfOhIA62O9O32m1vHr+eMrf CBHWc3SbA/CjDJXJWUmljD+tHmvIHneRTRYZDW10gNb1qalQ8L/Rp8Z6SrMMcROQLAMC vx36AdUJwitYuLGh6CG9kygfLAc/2pbqChUAsP4beyqydLEilhn26309T3pQ4xqlSJWA 9eVRMprfMStjy9nO5WX0ug3dZ5/73Qdme0Eh0rXei3OFxKA4z7WveKeg5SQi0PAt3Bgq 2GXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=7XHOcI1iqZxijVLGLW7nItKOPrRmjBgh32wAYk4SY0A=; b=bX3LEhgPksrhxWgyt/E2aSs1Gtvzr86Qrk64y82UCthryetnf2C0kT4Th4nMdTA3lh 3gzhXy6aP7ir45WeyC0FGe1o/7DDMfr17JHTuBzC2mn1sIm8kbPWqy3Jdc3iSHj1RVcF p4iEw1siIV+HlarKZkI77lpX6YywQFqpvuXVHF1Cruihe+/rwGrI9YSZskpid5ASRcAg l0sIjoN8FJHFkLOIcPOF7WYmLpbx/GBKPidhgg6OjqoRTPdnimnJA5VNLcsLKO+xoZOH A9Aj6L1yarvi+UksjbM6/PMhV/Ta9wvn2ih5yeIqhDL1ts3IO52GLHAdkhsY3T4HKNxy pDhA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=XHfgl+M3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d24si9609450ejy.735.2021.08.02.08.07.49; Mon, 02 Aug 2021 08:08:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=XHfgl+M3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234756AbhHBPEJ (ORCPT + 99 others); Mon, 2 Aug 2021 11:04:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234755AbhHBPEG (ORCPT ); Mon, 2 Aug 2021 11:04:06 -0400 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1B15C06175F; Mon, 2 Aug 2021 08:03:56 -0700 (PDT) Received: by mail-wr1-x42b.google.com with SMTP id z4so21879683wrv.11; Mon, 02 Aug 2021 08:03:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=7XHOcI1iqZxijVLGLW7nItKOPrRmjBgh32wAYk4SY0A=; b=XHfgl+M3acCK7c0V7HKcPwXjFcClgkgpF8EEGCvsL19dxnBBG8PXPRDF0zkNLhAD8C eoElgSmdGbPUlGq0V/ocmmR/FLq0tG2IvgAFaeO0dAPN+lrF5Z5l68N7kuJnebiW22km AjHuMo7XLOekNR127PjRnsWmXdYNG5QBW93oZYKySrszC/IQ1M+p2SCvLhVmy4jGlZgi NV2kQ2FPtPB5CHuO16ms8wcPhglWnWHekMJQChMndk42kaSo3w+aN2L6H1UKXpq2JD57 J/e9MuBhv8XBN+aL4sxNFY29iIIpagoCscQ9lmuvskMtv/HlEwPCDZ10W664wygmid0Z l6YA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=7XHOcI1iqZxijVLGLW7nItKOPrRmjBgh32wAYk4SY0A=; b=aZnhbs7oV4GDgkuOvNJPkvOcyvxkJuRMqeARpcP7wb1EYvrHcLZdURitSwSGqguvCn LmwJTbYRK7JP8w5iJF2JHSnBBgotwH6oeE0Bg1PtJGMxZy7zDPjN5no17xszOtng3Haa PvwE4V9m/xgtS9pY7eMncTi4anpxZNrODdaOQ3ZsDCjOLcTjGuTKs2fm/mOeG+y/nUiZ 8rtr2cxGj63CNQWfpEq7cFpMDwzrOy3zqIhxdTdv6VIbvkkYG0WWB5n2ahust6tYhk76 uEaZaFvdWny0hMlZ7KhoxVyWB1cexUdZAUIS3G3tlrr7L5u/A16T6GCnDY15iWKyHDj8 jHSA== X-Gm-Message-State: AOAM532mbRAQz4v8RK6ddoEZFl2ilCqVlOTszoCJumSRa4aE3WAXCzLX K96ZhWb/VeBPuLYiCsGTtQ2JL4/cTSdMvoW5M/k= X-Received: by 2002:a5d:4348:: with SMTP id u8mr19002665wrr.28.1627916635155; Mon, 02 Aug 2021 08:03:55 -0700 (PDT) MIME-Version: 1.0 References: <20210728140052.GB22887@mms-0441> <8b2742c8891abe4fec3664730717a089@codeaurora.org> <20210802105544.GA27657@willie-the-truck> In-Reply-To: <20210802105544.GA27657@willie-the-truck> From: Rob Clark Date: Mon, 2 Aug 2021 08:08:07 -0700 Message-ID: Subject: Re: [Freedreno] [PATCH 0/3] iommu/drm/msm: Allow non-coherent masters to use system cache To: Will Deacon Cc: Sai Prakash Ranjan , Georgi Djakov , "Isaac J. Manjarres" , David Airlie , Akhil P Oommen , "list@263.net:IOMMU DRIVERS , Joerg Roedel ," , Linux Kernel Mailing List , Sean Paul , Jordan Crouse , Kristian H Kristensen , dri-devel , Daniel Vetter , linux-arm-msm , freedreno , Robin Murphy , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Aug 2, 2021 at 3:55 AM Will Deacon wrote: > > On Thu, Jul 29, 2021 at 10:08:22AM +0530, Sai Prakash Ranjan wrote: > > On 2021-07-28 19:30, Georgi Djakov wrote: > > > On Mon, Jan 11, 2021 at 07:45:02PM +0530, Sai Prakash Ranjan wrote: > > > > commit ecd7274fb4cd ("iommu: Remove unused IOMMU_SYS_CACHE_ONLY flag") > > > > removed unused IOMMU_SYS_CACHE_ONLY prot flag and along with it went > > > > the memory type setting required for the non-coherent masters to use > > > > system cache. Now that system cache support for GPU is added, we will > > > > need to set the right PTE attribute for GPU buffers to be sys cached. > > > > Without this, the system cache lines are not allocated for GPU. > > > > > > > > So the patches in this series introduces a new prot flag IOMMU_LLC, > > > > renames IO_PGTABLE_QUIRK_ARM_OUTER_WBWA to IO_PGTABLE_QUIRK_PTW_LLC > > > > and makes GPU the user of this protection flag. > > > > > > Thank you for the patchset! Are you planning to refresh it, as it does > > > not apply anymore? > > > > > > > I was waiting on Will's reply [1]. If there are no changes needed, then > > I can repost the patch. > > I still think you need to handle the mismatched alias, no? You're adding > a new memory type to the SMMU which doesn't exist on the CPU side. That > can't be right. > Just curious, and maybe this is a dumb question, but what is your concern about mismatched aliases? I mean the cache hierarchy on the GPU device side (anything beyond the LLC) is pretty different and doesn't really care about the smmu pgtable attributes.. BR, -R