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[23.128.96.18]) by mx.google.com with ESMTP id i13si612829ilm.90.2021.08.02.16.24.03; Mon, 02 Aug 2021 16:24:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=fZhBqZC5; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232425AbhHBXWM (ORCPT + 99 others); Mon, 2 Aug 2021 19:22:12 -0400 Received: from mail.kernel.org ([198.145.29.99]:33812 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232208AbhHBXWL (ORCPT ); Mon, 2 Aug 2021 19:22:11 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 872B460EE6 for ; Mon, 2 Aug 2021 23:22:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1627946521; bh=3UoqdS3ZjZO9aG1FWGZpLNJXpg3edmkfj19jMqgZlag=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=fZhBqZC5RN6LFgGTGAhcn9gnxLB6jXBYSgOOOb3AzHHBvQBRGi0ncfOX+8XzA3G+b uRWDWytkUy+fILgu0GiBK/xlCsIiOBJQ/P3aTSYFsoynHfrSRGezrzY5rQRd+d1tgd enAjzKNkNQdAzL+CTW3IRAwInHu8WyyFLBFFzk5EGN7hpEs6yf1f5A3PRM2jhtoJgN aIa3A7EByOkol74HKb3UynsYZFhIl+Ut5hDk5XNUxCSB+Oropz9drSfdJcjcK1XQiv X2tzH143UQee2M7iIboGmRrlKHp/F5y1/gSMFEAGvWufIPxVp2UVwvahkDHr0mtcln Fb4lPigquJArA== Received: by mail-ej1-f42.google.com with SMTP id u3so873553ejz.1 for ; Mon, 02 Aug 2021 16:22:01 -0700 (PDT) X-Gm-Message-State: AOAM533aCXBQAHr55tfeHXwZY/r+t1dBSMVRNntpQrTiGYfzBXlI+djV M7tsEGH59rcrX8n8QGbqSLB9Ka661mlofGgfBA== X-Received: by 2002:a17:906:2451:: with SMTP id a17mr17629191ejb.75.1627946520087; Mon, 02 Aug 2021 16:22:00 -0700 (PDT) MIME-Version: 1.0 References: <20210714101141.2089082-1-enric.balletbo@collabora.com> <20210714121116.v2.7.Idbb4727ddf00ba2fe796b630906baff10d994d89@changeid> In-Reply-To: <20210714121116.v2.7.Idbb4727ddf00ba2fe796b630906baff10d994d89@changeid> From: Chun-Kuang Hu Date: Tue, 3 Aug 2021 07:21:49 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 7/7] drm/mediatek: mtk_dsi: Reset the dsi0 hardware To: Enric Balletbo i Serra Cc: linux-kernel , Chun-Kuang Hu , Hsin-Yi Wang , Collabora Kernel ML , Nicolas Boichat , Eizan Miyamoto , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , Jitao Shi , Daniel Vetter , David Airlie , Philipp Zabel , DRI Development , Linux ARM Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Enric: Enric Balletbo i Serra =E6=96=BC 2021=E5=B9= =B47=E6=9C=8814=E6=97=A5 =E9=80=B1=E4=B8=89 =E4=B8=8B=E5=8D=886:12=E5=AF=AB= =E9=81=93=EF=BC=9A > > Reset dsi0 HW to default when power on. This prevents to have different > settingbetween the bootloader and the kernel. > > As not all Mediatek boards have the reset consumer configured in their > board description, also is not needed on all of them, the reset is option= al, > so the change is compatible with all boards. Acked-by: Chun-Kuang Hu > > Cc: Jitao Shi > Suggested-by: Chun-Kuang Hu > Signed-off-by: Enric Balletbo i Serra > --- > > (no changes since v1) > > drivers/gpu/drm/mediatek/mtk_dsi.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediate= k/mtk_dsi.c > index ae403c67cbd9..d8b81e2ab841 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -11,6 +11,7 @@ > #include > #include > #include > +#include > > #include