Received: by 2002:a05:6a10:c7c6:0:0:0:0 with SMTP id h6csp2218128pxy; Tue, 3 Aug 2021 00:10:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwpR/u3uGdlGm7CABbQLYFM3aZb9xdAACAu2zYgfQkvpGNTxDXYMsaKScmtR3S9pEWCa+dY X-Received: by 2002:a05:6402:3089:: with SMTP id de9mr23007831edb.167.1627974649871; Tue, 03 Aug 2021 00:10:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627974649; cv=none; d=google.com; s=arc-20160816; b=IMN+OQOb7aZT4lD88wThY5SvDSl/LI6hzL5KNX5pSw1nlxoq9kEtcCldm0lCBjfZW0 7SAX9ikp9DUBKcn1jGLfjCdoDY/R++z4CjmJFjpqea+seVqte1yoMazmiimvnQx4r3Eu TIc5k8FLa7dVemAsNO/mfC53dapG18cHFZwAzqcPx+4IJ2ACstuhl3XYLD8Awsh0QLtq iy6s2VXTKxo0aCSINSzATtV9PhgFY/kJBxNv3K2GqUN8mH45ud8rsp8R4pyc5o5YiAaE tSR1JAxDPBKhLlRUFnPaC+xjplD8kMJGmzYNlp9hpN2OBYkUM0f2ne4u6S+AEJFVIrs8 B/PQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from; bh=dfN4YaNDXzyn9Ipus+glbsb+zi320hxDptLlhXnLzdA=; b=Y+seIff1xhYiTrZ9KM0PDJ1fiO7j9JsfzN9VPkDHb2iEszZnHicEY1CIbx71gPAY5h z5NSV4XKMyP+wlo0C5f2pEuvY2GFs+tnxxp8ni/Q3xrYV2XGb0FVD3CntuyBoV2a+0/g iTPPE7oG5W9DTSkZMQsVrSnpUHe3CZq6vDEBkK0ZWojRt+v2FuvOqOQMf17c2kVhqPwF VF59DojX659pjukAn2OkQy3IdjapbgfwbygvnBzmFtmU0dvYe2n7QA+HqwNsKkrbDv56 iVPRQiIBf6kSjwGwYqvyXGg6wy+o6uW+sS7q32ySqauNG5kFwk9BmUB/4hInPaPHCGm/ zuKw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u6si12861994eju.58.2021.08.03.00.10.26; Tue, 03 Aug 2021 00:10:49 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234164AbhHCHIn (ORCPT + 99 others); Tue, 3 Aug 2021 03:08:43 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:52360 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234055AbhHCHIn (ORCPT ); Tue, 3 Aug 2021 03:08:43 -0400 X-UUID: 957638fef2044e9c9e6c04fa6efe2b9d-20210803 X-UUID: 957638fef2044e9c9e6c04fa6efe2b9d-20210803 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2072926632; Tue, 03 Aug 2021 15:08:29 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 3 Aug 2021 15:08:28 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 3 Aug 2021 15:08:27 +0800 From: To: CC: , , , Yee Lee , Matthias Brugger , "moderated list:ARM/Mediatek SoC support" , "moderated list:ARM/Mediatek SoC support" Subject: [PATCH v4 0/1] arm64/cpufeature: Support optionally disable MTE Date: Tue, 3 Aug 2021 15:08:21 +0800 Message-ID: <20210803070824.7586-1-yee.lee@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Yee Lee An option in runtime to disable MTE support is necessary for some scenarios such as HW issue workaround, FW tests and some evaluation works in performance and resoruce costs. This patch supoorts to override id-reg on the shadow capability via comandline and suppress MTE feature. SCTLR_EL1.ATA/ATA0 setting is moved to cpu_enable_mte() since they are not allowed to be cache TLB. All works in this patch turn off related software support, but not fully disable MTE in HW side. === Test === QEMU5.2 + MTE (1) normal boot MTE feature is enabled and HW-tags KASAN works. (2) passed "arm64.nomte" in cmdline boot log: ..(skip) [ 0.000000] CPU features: SYS_ID_AA64PFR1_EL1[11:8]: forced to 0 ==== Changed since v4: - Move ATA/ATA0 setting to cpu_enable_mte() Changed since v3: - Add documentation text Changed since v2: - Use id-reg override machanism to suppress feature. Yee Lee (1): arm64/cpufeature: Optionally disable MTE via command-line Documentation/admin-guide/kernel-parameters.txt | 3 +++ arch/arm64/include/asm/sysreg.h | 3 +-- arch/arm64/kernel/cpufeature.c | 3 +++ arch/arm64/kernel/idreg-override.c | 2 ++ 4 files changed, 9 insertions(+), 2 deletions(-) -- 2.18.0