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[23.128.96.18]) by mx.google.com with ESMTP id u6si2481692eju.58.2021.08.04.09.04.33; Wed, 04 Aug 2021 09:05:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=IoULW2IJ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230063AbhHDQDY (ORCPT + 99 others); Wed, 4 Aug 2021 12:03:24 -0400 Received: from mail.kernel.org ([198.145.29.99]:58882 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229688AbhHDQDX (ORCPT ); Wed, 4 Aug 2021 12:03:23 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 63DB761002; Wed, 4 Aug 2021 16:03:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1628092990; bh=Y2C1L5U0SUZAqLMzWt93tWKBQx0TR0CWZaFJWmkji9M=; h=From:To:Cc:Subject:Date:From; b=IoULW2IJrz1OneVDGlbnYwVYteeO0F0G89hllsWtWhEYqHSdIXxV/Juqxk7SPs+gg vpf8uUJoI4NPsEDvU+nFM4ekb83QO4P9RrztLi4w2VWLo1OnWAdH64LEBwdf3kdGms vjjhZCwGDYi67zaIZYO+j/0wFxfIKXPniUHf/R2zIXEjG8QAPF6cuqdpPfwIoHBAkV oYrkV+1M0OMpLNMoX9qR8WpMTrE3OvqHEL3Ld12t3GmKM+vXDygTsDYqqKHwzdgrxs MZpLBoJ4Kx2aT2UN1COT0p0NSs+Qwl9N7hgv75/8SImD9BnsMnGnKGxVpuX9tUhN8p zgyHw+sYVudjA== Received: by mail.kernel.org with local (Exim 4.94.2) (envelope-from ) id 1mBJMK-000PzI-9M; Wed, 04 Aug 2021 18:03:08 +0200 From: Mauro Carvalho Chehab To: Vinod Koul , Bjorn Helgaas Cc: linuxarm@huawei.com, mauro.chehab@huawei.com, Mauro Carvalho Chehab , Rob Herring , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Binghui Wang , Xiaowei Song , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org Subject: [PATCH v9 00/11] Add support for Hikey 970 PCIe Date: Wed, 4 Aug 2021 18:02:56 +0200 Message-Id: X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: Mauro Carvalho Chehab Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The DT schema used by this series got merged at: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/log/?h=dt/next The series should apply cleanly on the top of v5.14-rc1. patch1 contains a PHY for Kirin 970 PCIe. The remaining patches add support for Kirin 970 at the pcie-kirin driver, and add the needed logic to compile it as module and to allow to dynamically remove the driver in runtime. Tested on HiKey970: # lspci -D -PP 0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3670 (rev 01) 0000:00:00.0/01:00.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba) 0000:00:00.0/01:00.0/02:01.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba) 0000:00:00.0/01:00.0/02:04.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba) 0000:00:00.0/01:00.0/02:05.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba) 0000:00:00.0/01:00.0/02:07.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba) 0000:00:00.0/01:00.0/02:09.0 PCI bridge: PLX Technology, Inc. PEX 8606 6 Lane, 6 Port PCI Express Gen 2 (5.0 GT/s) Switch (rev ba) 0000:00:00.0/01:00.0/02:01.0/03:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd Device a809 0000:00:00.0/01:00.0/02:07.0/06:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 07) Tested on HiKey960: # lspci -D 0000:00:00.0 PCI bridge: Huawei Technologies Co., Ltd. Device 3660 (rev 01) --- v9: - Did some cleanups at patches 1 and 5 Mauro Carvalho Chehab (11): phy: HiSilicon: Add driver for Kirin 970 PCIe PHY PCI: kirin: Reorganize the PHY logic inside the driver PCI: kirin: Add support for a PHY layer PCI: kirin: Use regmap for APB registers PCI: kirin: Add support for bridge slot DT schema PCI: kirin: Add Kirin 970 compatible PCI: kirin: Add MODULE_* macros PCI: kirin: Allow building it as a module PCI: kirin: Add power_off support for Kirin 960 PHY PCI: kirin: fix poweroff sequence PCI: kirin: Allow removing the driver drivers/pci/controller/dwc/Kconfig | 2 +- drivers/pci/controller/dwc/pcie-kirin.c | 646 ++++++++++++++----- drivers/phy/hisilicon/Kconfig | 10 + drivers/phy/hisilicon/Makefile | 1 + drivers/phy/hisilicon/phy-hi3670-pcie.c | 801 ++++++++++++++++++++++++ 5 files changed, 1312 insertions(+), 148 deletions(-) create mode 100644 drivers/phy/hisilicon/phy-hi3670-pcie.c -- 2.31.1