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Date:   Wed, 04 Aug 2021 16:05:25 +0100
Message-ID: <87im0lw8qy.wl-maz@kernel.org>
From:   Marc Zyngier <maz@kernel.org>
To:     Kishon Vijay Abraham I <kishon@ti.com>
Cc:     Bjorn Helgaas <bhelgaas@google.com>,
        Rob Herring <robh+dt@kernel.org>,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        Tom Joseph <tjoseph@cadence.com>, <linux-omap@vger.kernel.org>,
        <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        Lokesh Vutla <lokeshvutla@ti.com>
Subject: Re: [PATCH v2 1/3] dt-bindings: PCI: ti,j721e: Add bindings to specify legacy interrupts
In-Reply-To: <20210804132912.30685-2-kishon@ti.com>
References: <20210804132912.30685-1-kishon@ti.com>
        <20210804132912.30685-2-kishon@ti.com>
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On Wed, 04 Aug 2021 14:29:10 +0100,
Kishon Vijay Abraham I <kishon@ti.com> wrote:
> 
> Add bindings to specify interrupt controller for legacy interrupts.
> 
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
>  .../bindings/pci/ti,j721e-pci-host.yaml           | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
> index cc900202df29..f461d7b4c0cc 100644
> --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
> +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
> @@ -74,6 +74,11 @@ properties:
>  
>    msi-map: true
>  
> +patternProperties:
> +  "interrupt-controller":
> +    type: object
> +    description: interrupt controller to handle legacy interrupts.
> +
>  required:
>    - compatible
>    - reg
> @@ -97,6 +102,8 @@ unevaluatedProperties: false
>  
>  examples:
>    - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
>      #include <dt-bindings/soc/ti,sci_pm_domain.h>
>      #include <dt-bindings/gpio/gpio.h>
>  
> @@ -131,5 +138,13 @@ examples:
>              ranges = <0x01000000 0x0 0x10001000  0x00 0x10001000  0x0 0x0010000>,
>                       <0x02000000 0x0 0x10011000  0x00 0x10011000  0x0 0x7fef000>;
>              dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
> +
> +
> +            pcie0_intc: interrupt-controller {
> +                    interrupt-controller;
> +                    #interrupt-cells = <1>;
> +                    interrupt-parent = <&gic500>;
> +                    interrupts = <GIC_SPI 312 IRQ_TYPE_EDGE_RISING>;

Are you sure about the edge signalling? How is the interrupt
retriggered when the input is still high, which could well be the case
for shared INTx?

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.