Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
From:   Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
To:     Jonathan Cameron <jic23@kernel.org>,
        Geert Uytterhoeven <geert+renesas@glider.be>,
        Rob Herring <robh+dt@kernel.org>,
        Lars-Peter Clausen <lars@metafoo.de>,
        Magnus Damm <magnus.damm@gmail.com>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Alexandru Ardelean <aardelean@deviqon.com>,
        linux-iio@vger.kernel.org, devicetree@vger.kernel.org,
        linux-renesas-soc@vger.kernel.org
Cc:     linux-kernel@vger.kernel.org,
        Prabhakar <prabhakar.csengg@gmail.com>,
        Biju Das <biju.das.jz@bp.renesas.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH v4 0/3] Renesas RZ/G2L ADC driver support
Date:   Wed,  4 Aug 2021 21:21:15 +0100
Message-Id: <20210804202118.25745-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
Precedence: bulk

Hi All,

This patch series adds ADC support for Renesas RZ/G2L family.

Patches apply on top of v5.14-rc2.

Cheers,
Prabhakar

Changes for v4:
* Fixed registering action to assert resets on failure/remove
  as reported by Philip.
* Fixed review comments suggested by Jonathan.
* Included RB tag from Rob for patch 1/3
* Note DTS patch applies on top of https://git.kernel.org/pub/scm/
  linux/kernel/git/geert/renesas-devel.git/log/
  ?h=renesas-arm-dt-for-v5.15

Changes for v3 (as requested by Jonathan):
* Made use of FIELD_PREP()
* Renamed _CLEAR to _MASK and inverted inline as required
* Moved |= pair's on same lines
* Made use of sysfs_emit() while reading the labels
* Used for_each_bit_set() in rzg2l_adc_isr()
* Renamed rzg2l_adc_parse_of() -> rzg2l_adc_parse_properties()
* Used devm_add_action_or_reset() for asserting the reset signals and
  disabling pm_runtime and eventually removing remove() callback
* Added comments in isr handler for channel select interrupt
* Moved enabling/disabling of pclk during hw init in rzg2l_adc_hw_init()
* Dropped clock patch 3/4 (https://lore.kernel.org/patchwork/patch/1462152/)
  from previous series as its queued up in renesas-clk-for-v5.15

Changes for v2:
* Update binding doc, dropped gpios/renesas-rzg2l,adc-trigger-mode
  properties included channel property to represent each wired channel.
* Fixed review comments pointed by Alexandru, implemented pm runtime
  support, dropped mlock usage
* Fixed review comments pointed by Jonathan, renamed the macros,
  simplified the code.
* Included clock and DT patches

v1: https://patchwork.kernel.org/project/linux-renesas-soc/cover/
    20210629220328.13366-1-prabhakar.mahadev-lad.rj@bp.renesas.com/

Lad Prabhakar (3):
  dt-bindings: iio: adc: Add binding documentation for Renesas RZ/G2L
    A/D converter
  iio: adc: Add driver for Renesas RZ/G2L A/D converter
  arm64: dts: renesas: r9a07g044: Add ADC node

 .../bindings/iio/adc/renesas,rzg2l-adc.yaml   | 134 ++++
 MAINTAINERS                                   |   8 +
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi    |  42 ++
 drivers/iio/adc/Kconfig                       |  10 +
 drivers/iio/adc/Makefile                      |   1 +
 drivers/iio/adc/rzg2l_adc.c                   | 600 ++++++++++++++++++
 6 files changed, 795 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
 create mode 100644 drivers/iio/adc/rzg2l_adc.c

-- 
2.17.1