Received: by 2002:a05:6a10:c604:0:0:0:0 with SMTP id y4csp506828pxt; Thu, 5 Aug 2021 05:12:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzqAgYO2w9apamAzXJgk55DmHepqhgrscKOa9JXYGrFmUwvYuhWrP99HwiP8tNagtRtFerh X-Received: by 2002:aa7:ccc1:: with SMTP id y1mr5991566edt.321.1628165556135; Thu, 05 Aug 2021 05:12:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1628165556; cv=none; d=google.com; s=arc-20160816; b=SCN8gz94Alceqi+JcaoZjc1ZwU13xsItKTBmtl6MGauG6z9XZzP+iIUf24BZ07jqjp bv/pwi54+65n0vFjCN0Kf4lT2xU3oU3+PlbwQOoPYIKNWlyj8uA3nb62GGSXCyRPNMyd D4Rkk1Z6Uqvd3+DiQISyVvLtjq67dBkAVofRORRD+0VipssIefKf/83I+SboRsGKLavg 7smEXMNGMJAIKeNK3lM9hwhaoJ1vIjvYpyAVCdQZf+BNOzrjphGqGcMx8rW5TQu9b+N0 hPZglj9XJjdxrnCXaayZ/LosvQ53BNskQHpG7M0CCpX0Q0wOl/yL6t/0drRuVaipWQnn XTzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:user-agent:references:in-reply-to :subject:cc:to:from:message-id:date; bh=z7hFEE8oFO/OYrnOL5lRzgmCS3mFiihZHMzXD27oGq8=; b=e0Grwpnv5GKu8/3dCMDCCmwHL5uCLgTMSudpiPXTs81ng7QGdhzMgVwC5lRUruX/sC heDmBIfvr3Y0jckkLXW/NzAjTyb2gLMlr2i2+eLeLRUqp1e8Je4dv9IDlyinecsCPYxB aWUiQxtN46UQGTUj8O2KrC+LWCMCZzixltl9yTq0GUe2S6SzszxA0dL2+ukDGUmIR55h Cp56n7azo9kMNp+Ap1nNtOj5OEbXl8KCnx+bAE0yQMmNhXl/jtvAZVcP2vPI7YiadoqZ fub/1Gi7TKHtgUUViq7qCChFOBnpLQyPlUF5exkPQ6kQYrsOgt8RTkSRtstH09GQ6qMi Y3eg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id q13si3723212ejz.268.2021.08.05.05.12.09; Thu, 05 Aug 2021 05:12:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233624AbhHEIfe (ORCPT + 99 others); Thu, 5 Aug 2021 04:35:34 -0400 Received: from mail.kernel.org ([198.145.29.99]:47180 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232273AbhHEIfd (ORCPT ); Thu, 5 Aug 2021 04:35:33 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0642060F43; Thu, 5 Aug 2021 08:35:20 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mBYqU-0035ZU-0u; Thu, 05 Aug 2021 09:35:18 +0100 Date: Thu, 05 Aug 2021 09:35:17 +0100 Message-ID: <87wnp0b86y.wl-maz@kernel.org> From: Marc Zyngier To: Sunil Muthuswamy Cc: Robin Murphy , Thomas Gleixner , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "catalin.marinas@arm.com" , "will@kernel.org" , Michael Kelley , Boqun Feng , KY Srinivasan , Arnd Bergmann Subject: Re: [EXTERNAL] Re: [RFC 1/1] irqchip/gic-v3-its: Add irq domain and chip for Direct LPI without ITS In-Reply-To: References: <87a6mt2jke.wl-maz@kernel.org> <87tuka24kj.wl-maz@kernel.org> <87r1f9wooc.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: sunilmut@microsoft.com, robin.murphy@arm.com, tglx@linutronix.de, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will@kernel.org, mikelley@microsoft.com, Boqun.Feng@microsoft.com, kys@microsoft.com, arnd@arndb.de X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 04 Aug 2021 21:10:43 +0100, Sunil Muthuswamy wrote: > > Thanks Marc and Robin for clarifying. I see and understand the point > about having explicit MSI mappings in the firmware specification for > Direct LPIs for generic hardware support. > > Hey Mark I assume this is for me? > would you be willing to consider a scoped down implementation of GIC > Direct LPI with just an IRQ chip implementation and no Direct LPI > PCI-MSI IRQ chip. Could you please clarify? If you are not implementing MSIs, how can a device signal LPIs? At the end of the day, something has to write into the RD, and it isn't going to happen by sheer magic. > This will allow a MSI provider (such as Hyper-V vPCI) to provide a > PCI-MSI IRQ chip on top of the Direct LPI IRQ chip and enable > PCI-MSI scenarios, and avoid building in assumptions in other cases > (like PCI) where firmware specification is not available. I really don't get what you are suggesting. Could you please describe what you have in mind? M. -- Without deviation from the norm, progress is not possible.