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Date:   Thu, 5 Aug 2021 16:51:27 -0700
From:   Matthias Kaehlcke <mka@chromium.org>
To:     Alex Elder <elder@linaro.org>
Cc:     bjorn.andersson@linaro.org, agross@kernel.org, robh+dt@kernel.org,
        elder@kernel.org, linux-arm-msm@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/4] arm64: dts: qcom: sc7280: add IPA information
Message-ID: <YQx5f9dD9KOGrXao@google.com>
References: <20210804210214.1891755-1-elder@linaro.org>
 <20210804210214.1891755-2-elder@linaro.org>
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On Wed, Aug 04, 2021 at 04:02:11PM -0500, Alex Elder wrote:
> Add IPA-related nodes and definitions to "sc7280.dtsi", including
> the reserved memory area used for AP-based IPA firmware loading.
> 
> Signed-off-by: Alex Elder <elder@linaro.org>
> ---
>  arch/arm64/boot/dts/qcom/sc7280.dtsi | 42 ++++++++++++++++++++++++++++
>  1 file changed, 42 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 029723a75edef..5764c5b5cae17 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -69,6 +69,11 @@ cpucp_mem: memory@80b00000 {
>  			no-map;
>  			reg = <0x0 0x80b00000 0x0 0x100000>;
>  		};
> +
> +		ipa_fw_mem: memory@8b700000 {
> +			reg = <0 0x8b700000 0 0x10000>;
> +			no-map;
> +		};
>  	};
>  
>  	cpus {
> @@ -568,6 +573,43 @@ mmss_noc: interconnect@1740000 {
>  			qcom,bcm-voters = <&apps_bcm_voter>;
>  		};
>  
> +		ipa: ipa@1e40000 {
> +			compatible = "qcom,sc7280-ipa";
> +
> +			iommus = <&apps_smmu 0x480 0x0>,
> +				 <&apps_smmu 0x482 0x0>;
> +			reg = <0 0x1e40000 0 0x8000>,
> +			      <0 0x1e50000 0 0x4ad0>,
> +			      <0 0x1e04000 0 0x23000>;
> +			reg-names = "ipa-reg",
> +				    "ipa-shared",
> +				    "gsi";
> +
> +			interrupts-extended = <&intc 0 654 IRQ_TYPE_EDGE_RISING>,
> +					      <&intc 0 432 IRQ_TYPE_LEVEL_HIGH>,

nit: use GIC_SPI for the interrupt type

> +					      <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
> +					      <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
> +			interrupt-names = "ipa",
> +					  "gsi",
> +					  "ipa-clock-query",
> +					  "ipa-setup-ready";
> +
> +			clocks = <&rpmhcc RPMH_IPA_CLK>;
> +			clock-names = "core";
> +
> +			interconnects = <&aggre2_noc MASTER_IPA 0 &mc_virt SLAVE_EBI1 0>,
> +					<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_IPA_CFG 0>;
> +			interconnect-names = "memory",
> +					     "config";
> +
> +			qcom,smem-states = <&ipa_smp2p_out 0>,
> +					   <&ipa_smp2p_out 1>;
> +			qcom,smem-state-names = "ipa-clock-enabled-valid",
> +						"ipa-clock-enabled";
> +
> +			status = "disabled";
> +		};
> +

I know little about IPA, but besides the nit this looks sane to me.

Reviewed-by: Matthias Kaehlcke <mka@chromium.org>