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Fri, 6 Aug 2021 10:06:44 +0000 Received: from BY5PR04MB6739.namprd04.prod.outlook.com ([fe80::5c0e:fbe5:2bd6:ec6]) by BY5PR04MB6739.namprd04.prod.outlook.com ([fe80::5c0e:fbe5:2bd6:ec6%3]) with mapi id 15.20.4394.019; Fri, 6 Aug 2021 10:06:44 +0000 Date: Fri, 6 Aug 2021 18:06:39 +0800 From: Xin Ji To: Robert Foss Cc: Nicolas Boichat , Andrzej Hajda , Neil Armstrong , Laurent Pinchart , Jonas Karlman , Dan Carpenter , David Airlie , Daniel Vetter , Boris Brezillon , Sam Ravnborg , Hsin-Yi Wang , Torsten Duwe , Vasily Khoruzhick , Marek Szyprowski , Bernie Liang , Qilin Wen , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, devel@driverdev.osuosl.org Subject: Re: [PATCH v2 1/1] drm/bridge: anx7625: Tune K value for IVO panel Message-ID: <20210806100639.GA2207093@anxtwsw-Precision-3640-Tower> References: Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-ClientProxiedBy: HK2PR04CA0078.apcprd04.prod.outlook.com (2603:1096:202:15::22) To BY5PR04MB6739.namprd04.prod.outlook.com (2603:10b6:a03:229::8) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from anxtwsw-Precision-3640-Tower (60.251.58.79) by HK2PR04CA0078.apcprd04.prod.outlook.com (2603:1096:202:15::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4394.15 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?haUR7gFQxrXwIjfGiT/oZg5Ue+5zyLVA8qz9agi0FX46SSjXMw25aKfMcAN3?= =?us-ascii?Q?ZYFqMi3AJ3Kb/IdOPq4+AVGM8uiLG4CX41fqUpS1qzP32rBWcfX7FnMz8ZN5?= =?us-ascii?Q?tGoAWm5wOwMqIXpbkc0EsatVaYicTxU1EWCuT/X02mZrrXjcaL8as72+FGRl?= =?us-ascii?Q?EqMq61TVk/sJMP5jAf1iQ/TuLgmQEcjhV+tHWqKrEXbJV7QomfiA2DazI7sy?= =?us-ascii?Q?gXtXeWgP/fVwLs80JL5x0sDdLDVkkRw8SQIs5lM89gDn12pbGUmmXJ0Eg+58?= =?us-ascii?Q?aGlaY8Ix0vghUZSw/RRrmhvVG1hNG1N3rB8vq/PwpPWGsFkA5paSyPHQ4OSQ?= =?us-ascii?Q?+EcqLsH7gBsZIoRrP9S+pPQF7kSFang0FzC5wm0nNkgujjlnwrJy7OAtjMks?= =?us-ascii?Q?2k3+E5vghxyVj/Ubr69bq9XtX57j4CeYtkxgyrXLAEuTrb7BFqYrJDnjsl3+?= =?us-ascii?Q?dfwLVekBzWFAAktU3r8HtDiW2Tl+HWoz4TXrKh2BFwPrub8KBxjFy3LxY8wT?= =?us-ascii?Q?4TbFo4ylCxAeTQ9fPH5rcw5aXfTgCYO+IdXSNkqiSf0KNDuIUbJGJAEdHC/t?= =?us-ascii?Q?RGL/m7MyjvNhy2YY2GLA6k+XHEV4rJDYdDSV+mUxA2QvQGkBUi3O8RLNFjk0?= =?us-ascii?Q?rB445iQbcEhIn+5DNv+Eu7w4cRb6dqNtf7ij1pfOTZUw3ChsgC0g+h4rUaZu?= =?us-ascii?Q?f48z5THIo2kz+JzkxOvFrUjeIDDAjaUvmTOxGTUW44oi3wGXc9130I1xA+Ep?= =?us-ascii?Q?EAEI/DJ3CzTzAKjMVjfsimb4M4e790mSzXVDaVJGb9+TOcKgFEq5S7GdcOHw?= =?us-ascii?Q?mYxj73yLZWi5Skjx+4y92JvzovWBK0rmUywMaAzERN7zQ4xfKP3jPYe/D+Yj?= =?us-ascii?Q?n4HjkdwHx22qNXmOmvfnKG0UWQZ/gXn6jia375SQLaKSaDcQciHmANfbYPkU?= =?us-ascii?Q?OLS3i3ykfvzo5M3r02cUNqXdmjYCdeihOfaG9fBcLObPbP6+APTRucTmX/Hc?= =?us-ascii?Q?TCOmg7iJWsuNAhSXBIH+2gF0G+tKLCtpsbwGdpsHUbePP8tCKH3SXtseolAQ?= =?us-ascii?Q?Bkv+fTN+61XrE7ruA8U4NLAAuPm8y5ECoDPXYLmDWINLPChpWCBVEXAOc9Cy?= =?us-ascii?Q?sjBuTURkKoXjknfPcjd17Hb+SSAXkNKt1k53bWEjydVZUFAqoqDDL6AKMnA2?= =?us-ascii?Q?ZJlx47Q4qH2eQMcAN3IrgV6ylKrzpG85UdPtbqdq614cfZ+jArD+2kPbcIRY?= =?us-ascii?Q?pLu1iJYPgLSQW9o/9/nclGsGfeiouMQZF/oQqbUrq7u06S3UXZu16tgmJvUR?= =?us-ascii?Q?Ox1nFdsMFDAiijJ8S+tUbTzf?= X-OriginatorOrg: analogixsemi.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1d903c8f-bfe7-4eba-5108-08d958c1e4b1 X-MS-Exchange-CrossTenant-AuthSource: BY5PR04MB6739.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Aug 2021 10:06:44.0345 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b099b0b4-f26c-4cf5-9a0f-d5be9acab205 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: RP3NCK4nCxLURWV5m++fr/XAswJyCQxKTQXBfgXu3fBbIRdJ0R7g/JpBYV2Z7TozmY4PILnx17bPO0h/WEPXLw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR04MB6913 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Aug 06, 2021 at 11:42:26AM +0200, Robert Foss wrote: > Hey Xin, > > Thanks for implementing the suggestion so quickly. > > Can you send this version of the patch out as v2? Versioning is > important and both tools and processes break if different versions > aren't submitted in different emails. Hi Robert Foss, OK, thanks. Xin > > On Fri, 6 Aug 2021 at 11:35, Xin Ji wrote: > > > > IVO panel require less input video clock variation than video clock > > variation in DP CTS spec. > > > > This patch decreases the K value of ANX7625 which will shrink eDP Tx > > video clock variation to meet IVO panel's requirement. > > > > Acked-by: Sam Ravnborg > > Signed-off-by: Xin Ji > > --- > > drivers/gpu/drm/bridge/analogix/anx7625.c | 24 ++++++++++++++++++++--- > > drivers/gpu/drm/bridge/analogix/anx7625.h | 4 +++- > > 2 files changed, 24 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c > > index a3d82377066b..9b9e3984dd38 100644 > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.c > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c > > @@ -384,6 +384,25 @@ static int anx7625_odfc_config(struct anx7625_data *ctx, > > return ret; > > } > > > > +/* > > + * The MIPI source video data exist large variation (e.g. 59Hz ~ 61Hz), > > + * anx7625 defined K ratio for matching MIPI input video clock and > > + * DP output video clock. Increase K value can match bigger video data > > + * variation. IVO panel has small variation than DP CTS spec, need > > + * decrease the K value. > > + */ > > +static int anx7625_set_k_value(struct anx7625_data *ctx) > > +{ > > + struct edid *edid = (struct edid *)ctx->slimport_edid_p.edid_raw_data; > > + > > + if (edid->mfg_id[0] == IVO_MID0 && edid->mfg_id[1] == IVO_MID1) > > + return anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > > + MIPI_DIGITAL_ADJ_1, 0x3B); > > + > > + return anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > > + MIPI_DIGITAL_ADJ_1, 0x3D); > > +} > > + > > static int anx7625_dsi_video_timing_config(struct anx7625_data *ctx) > > { > > struct device *dev = &ctx->client->dev; > > @@ -470,9 +489,8 @@ static int anx7625_dsi_video_timing_config(struct anx7625_data *ctx) > > MIPI_PLL_N_NUM_15_8, (n >> 8) & 0xff); > > ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, MIPI_PLL_N_NUM_7_0, > > (n & 0xff)); > > - /* Diff */ > > - ret |= anx7625_reg_write(ctx, ctx->i2c.rx_p1_client, > > - MIPI_DIGITAL_ADJ_1, 0x3D); > > + > > + anx7625_set_k_value(ctx); > > > > ret |= anx7625_odfc_config(ctx, post_divider - 1); > > > > diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h b/drivers/gpu/drm/bridge/analogix/anx7625.h > > index 034c3840028f..6dcf64c703f9 100644 > > --- a/drivers/gpu/drm/bridge/analogix/anx7625.h > > +++ b/drivers/gpu/drm/bridge/analogix/anx7625.h > > @@ -210,7 +210,9 @@ > > #define MIPI_VIDEO_STABLE_CNT 0x0A > > > > #define MIPI_LANE_CTRL_10 0x0F > > -#define MIPI_DIGITAL_ADJ_1 0x1B > > +#define MIPI_DIGITAL_ADJ_1 0x1B > > +#define IVO_MID0 0x26 > > +#define IVO_MID1 0xCF > > > > #define MIPI_PLL_M_NUM_23_16 0x1E > > #define MIPI_PLL_M_NUM_15_8 0x1F > > -- > > 2.25.1 > >