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[198.48.202.89]) by smtp.gmail.com with ESMTPSA id j5sm8363362qki.80.2021.08.08.15.46.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 08 Aug 2021 15:46:55 -0700 (PDT) Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Sun, 08 Aug 2021 18:46:54 -0400 Message-Id: Cc: , , , Subject: Re: [PATCH v5 1/5] iio: adc: ad7949: define and use bitfield names From: "Liam Beguin" To: "Joe Perches" , , , , , References: <20210808015659.2955443-1-liambeguin@gmail.com> <20210808015659.2955443-2-liambeguin@gmail.com> In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun Aug 8, 2021 at 12:51 PM EDT, Joe Perches wrote: > On Sat, 2021-08-07 at 21:56 -0400, Liam Beguin wrote: > > Replace raw configuration register values by using FIELD_PREP and > > defines to improve readability. > [] > > diff --git a/drivers/iio/adc/ad7949.c b/drivers/iio/adc/ad7949.c > [] > +#define AD7949_CFG_BIT_INCC GENMASK(12, 10) > Hi Joe, > I think the naming is a bit confusing as it appears as if > these bitfield ranges are single bits. That makes sense. Would AD7949_CFG_BITS_* be good enough? Thanks, Liam > > > +/* REF: reference/buffer selection */ > > +#define AD7949_CFG_BIT_REF GENMASK(5, 3) > [] > > +/* SEQ: channel sequencer. Allows for scanning channels */ > > +#define AD7949_CFG_BIT_SEQ GENMASK(2, 1) > >=20