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From:   Guo Ren <guoren@kernel.org>
Date:   Tue, 10 Aug 2021 09:30:30 +0800
Message-ID: <CAJF2gTTjBDF9cpN4J=ff2pCLXjc9uoBpfTzeTHhMAwg7OCShfA@mail.gmail.com>
Subject: Re: [PATCH] riscv: add ARCH_DMA_MINALIGN support
To:     Xianting TIan <xianting.tian@linux.alibaba.com>
Cc:     Jisheng Zhang <jszhang3@mail.ustc.edu.cn>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        linux-riscv <linux-riscv@lists.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Arnd Bergmann <arnd@arndb.de>
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On Mon, Aug 9, 2021 at 9:55 AM Xianting TIan
<xianting.tian@linux.alibaba.com> wrote:
>
>
> =E5=9C=A8 2021/8/9 =E4=B8=8A=E5=8D=8812:30, Jisheng Zhang =E5=86=99=E9=81=
=93:
> > On Sat,  7 Aug 2021 22:55:37 +0800
> > Xianting Tian <xianting.tian@linux.alibaba.com> wrote:
> >
> >> Introduce ARCH_DMA_MINALIGN to riscv arch.
> >>
> >> Signed-off-by: Xianting Tian <xianting.tian@linux.alibaba.com>
> >> ---
> >>   arch/riscv/include/asm/cache.h | 2 ++
> >>   1 file changed, 2 insertions(+)
> >>
> >> diff --git a/arch/riscv/include/asm/cache.h b/arch/riscv/include/asm/c=
ache.h
> >> index 9b58b1045..2945bbe2b 100644
> >> --- a/arch/riscv/include/asm/cache.h
> >> +++ b/arch/riscv/include/asm/cache.h
> >> @@ -11,6 +11,8 @@
> >>
> >>   #define L1_CACHE_BYTES             (1 << L1_CACHE_SHIFT)
> >>
> >> +#define ARCH_DMA_MINALIGN   L1_CACHE_BYTES
> > It's not a good idea to blindly set this for all riscv. For "coherent"
> > platforms, this is not necessary and will waste memory.

quote from slab.h:
 * Some archs want to perform DMA into kmalloc caches and need a guaranteed
 * alignment larger than the alignment of a 64-bit integer.
 * Setting ARCH_KMALLOC_MINALIGN in arch headers allows that.

ARCH_DMA_MINALIGN is for the whole system, maybe we could give a
DMA_MINALIGN Kconfig entry in arch/riscv?

> >
> thanks for the reply,
>
> So riscv is the "coherent" platform?
>
> I submit this patch as I got a fix suggestion of another patch to use
> ARCH_DMA_MINALIGN, but riscv doesn't define it.
>
> https://lkml.org/lkml/2021/8/6/723 <https://lkml.org/lkml/2021/8/6/723>
>
> Considering the portability of the code, in my opinion, it is better to
> define it for riscv if it is not "coherent" platform.
>
> >> +
> >>   /*
> >>    * RISC-V requires the stack pointer to be 16-byte aligned, so ensur=
e that
> >>    * the flat loader aligns it accordingly.


--=20
Best Regards
 Guo Ren

ML: https://lore.kernel.org/linux-csky/