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[23.128.96.18]) by mx.google.com with ESMTP id g2si29571611ioo.75.2021.08.10.07.22.48; Tue, 10 Aug 2021 07:23:00 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=Lt1tyTHb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242017AbhHJNxv (ORCPT + 99 others); Tue, 10 Aug 2021 09:53:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242014AbhHJNxs (ORCPT ); Tue, 10 Aug 2021 09:53:48 -0400 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D848C06179A for ; Tue, 10 Aug 2021 06:53:26 -0700 (PDT) Received: by mail-wr1-x42b.google.com with SMTP id f5so10617657wrm.13 for ; Tue, 10 Aug 2021 06:53:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=KGQUuCBolB3utTNPACMz6iKuWRDIGgWJm/VpB8UjVfc=; b=Lt1tyTHbI94Kgt8wK9nxBSF3jPgGselZKupAsXiBd6uILEZdcKhg5LYPO6QfrIiNvi DWrV2wRXXA01ZHs26Vovn0Uojl4XIZZFox4wswtHZgW6Xuxv9jpzdV5pcfkzcnB8xjO1 TBhoaYhdFbcRFLb7zW+HVGuD9FiUQp4XHqAABpYgaKY4UU49KRmdSyW6Gl4SH0P13q5B Y8wnQ6tNXvOlirXy8jU6Jnp8ImOSwA01aM1IFV5xhXKnjxp2c/EBgSwL8wXkddc1RRFa eVi+aWY8EqcCcAi0Ux4F4hsXAxDQinpBrytVKz9rF1QrcnzQ3f3cxJ1deYdyTrUpm9FP u/Tw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=KGQUuCBolB3utTNPACMz6iKuWRDIGgWJm/VpB8UjVfc=; b=rhDJyXNdNb2+tz3xkutH/S/boLcLfHGxfa6BK8a6jlVxiAGkIFahLo5lkqHJ2tK9yW HPCRYr2XQOrP+QJn2DYVOl9lSlEVyjLIiX6NXiJQ5JorKjUFWXpVW9PzBefN+4BOciXH Lru697oYxh4kKH3nWvpegLel4bYJsrnX7/L4DSKINjcMtEOyoHavHiDC2yQxjShoWGEl IkDeM58ZIQgMOy6uw5CPwnlz1LbCDZVszFyJeu0S7MBETUmVBbf0yCN5Ib4sdkJL+yjX jsHUhRsNvQ9rHr/R9TY8EgAUPIbicWfDjtvfrK65OPsVeRE7h3pMf1ALSxqIHZfEVXvs CNgw== X-Gm-Message-State: AOAM530iu6ORilsHfRIqx9NyiIiZXC1ImLZYYqSgeupPXFWhA4pgWwr/ F5rCebFaxbZW9uyMmxEvOcWtLg== X-Received: by 2002:a5d:660e:: with SMTP id n14mr13818163wru.346.1628603604443; Tue, 10 Aug 2021 06:53:24 -0700 (PDT) Received: from google.com ([2a00:79e0:d:210:e920:cedf:a082:9d02]) by smtp.gmail.com with ESMTPSA id 18sm3305981wmv.27.2021.08.10.06.53.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Aug 2021 06:53:24 -0700 (PDT) Date: Tue, 10 Aug 2021 14:53:18 +0100 From: Quentin Perret To: Lukasz Luba Cc: Viresh Kumar , Rafael Wysocki , Vincent Donnefort , Andy Gross , Bjorn Andersson , Cristian Marussi , Fabio Estevam , Kevin Hilman , Matthias Brugger , NXP Linux Team , Pengutronix Kernel Team , Sascha Hauer , Shawn Guo , Sudeep Holla , linux-pm@vger.kernel.org, Vincent Guittot , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-omap@vger.kernel.org Subject: Re: [PATCH 0/8] cpufreq: Auto-register with energy model Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tuesday 10 Aug 2021 at 14:25:15 (+0100), Lukasz Luba wrote: > The way I see this is that the flag in cpufreq avoids > mistakes potentially made by driver developer. It will automaticaly > register the *simple* EM model via dev_pm_opp_of_register_em() on behalf > of drivers (which is already done manually by drivers). The developer > would just set the flag similarly to CPUFREQ_IS_COOLING_DEV and be sure > it will register at the right time. Well tested flag approach should be > safer, easier to understand, maintain. I would agree with all that if calling dev_pm_opp_of_register_em() was complicated, but that is not really the case. I don't think we ever call PM_OPP directly from cpufreq core ATM, which makes a lot of sense if you consider PM_OPP arch-specific. I could understand that we might accept a little 'violation' of the abstraction with this series if there were real benefits, but I just don't see them.