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[23.128.96.18]) by mx.google.com with ESMTP id z4si22505984ilo.41.2021.08.10.09.30.24; Tue, 10 Aug 2021 09:30:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20161025 header.b=aFsv3vr+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240598AbhHJMgQ (ORCPT + 99 others); Tue, 10 Aug 2021 08:36:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240605AbhHJMgK (ORCPT ); Tue, 10 Aug 2021 08:36:10 -0400 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6DDA4C061799 for ; Tue, 10 Aug 2021 05:35:47 -0700 (PDT) Received: by mail-wr1-x42a.google.com with SMTP id k29so13263963wrd.7 for ; Tue, 10 Aug 2021 05:35:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=cXcVfaJa9gxQfqomI6BeLC46V441BROQ5crN/C0u7tQ=; b=aFsv3vr+XQ6POKdiOCpyItN/s1A3yD15/zjn5UostldN1x0iL5S1t/7EXoUl4mMz8Q 8uowNLbyuG2VkEPcjjwnxbK6tW9BeU8zchx6GlPqOffGl7lbLoMYd2ECnz8EIIuFGAW4 Rjt6Db4jWbDc7edO/2yn9cC82+Y6maFBe7ARMIb6MT9SB32P8lSW/xxLmi6ooVHg1n1R fWj5yHcEtOUtG6Zie4y9ktNsQrvGTNFnDBCFkPxHUKFMLVmRIrHiV6Yn7GSXi+ytpjxw UFqTo3igkPxFx/S9aTva5s6e+RD887u4ahF5QGcNM7fvB5Dfu3sNWWxy584kPwVotjxq cW3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=cXcVfaJa9gxQfqomI6BeLC46V441BROQ5crN/C0u7tQ=; b=Iauv5/GmT8sy7qCpmN2mnXzOsBlD2dXFAQ6cSwK6R+YznngUKLwMJxrXL0pA5L1gIe +j3QAwJmAw/2rf5vaPz6mM6inCY9CfU2XHcPt/NoYJ5YphS2nmlo3T1gAXVLw9cm5d4P 8Qda1jMH9D/gKrvzrvZ6822NtPB44+x4y1iCpUv/C5FcYBzQADV9m0NYJboVQ8b0RqXS yTNtiDWloF4H2RhyxGCu/osSrSKNHJg7qSNmmuSiKk/8RdRuCTbZxdNmRAI73fR7JUWF aulV8cSpPoheNMlhvY3uZOC+FuacdzG3suVdfacf7UVHz5ehEtWowlKJp/iti/dC+Edy Qjog== X-Gm-Message-State: AOAM532gMqYtPm+EuOvIxWVPMlAPfSiO33tK+j+18MipjO7Wu5Cf5kEH gqWhuCt7u+jftlhzHF2KTqybtg== X-Received: by 2002:adf:e5cf:: with SMTP id a15mr30538552wrn.362.1628598945798; Tue, 10 Aug 2021 05:35:45 -0700 (PDT) Received: from google.com ([2a00:79e0:d:210:e920:cedf:a082:9d02]) by smtp.gmail.com with ESMTPSA id 104sm23687271wrc.4.2021.08.10.05.35.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Aug 2021 05:35:45 -0700 (PDT) Date: Tue, 10 Aug 2021 13:35:39 +0100 From: Quentin Perret To: Viresh Kumar Cc: Rafael Wysocki , Vincent Donnefort , lukasz.luba@arm.com, Andy Gross , Bjorn Andersson , Cristian Marussi , Fabio Estevam , Kevin Hilman , Matthias Brugger , NXP Linux Team , Pengutronix Kernel Team , Sascha Hauer , Shawn Guo , Sudeep Holla , linux-pm@vger.kernel.org, Vincent Guittot , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-omap@vger.kernel.org Subject: Re: [PATCH 0/8] cpufreq: Auto-register with energy model Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tuesday 10 Aug 2021 at 13:06:47 (+0530), Viresh Kumar wrote: > Provide a cpufreq driver flag so drivers can ask the cpufreq core to register > with the EM core on their behalf. Hmm, that's not quite what this does. This asks the cpufreq core to use *PM_OPP* to register an EM, which I think is kinda wrong to do from there IMO. The decision to use PM_OPP or another mechanism to register an EM belongs to platform specific code (drivers), so it is odd for the PM_OPP registration to have its own cpufreq flag but not the other ways. As mentioned in another thread, the very reason to have PM_EM is to not depend on PM_OPP, so I'm worried about the direction of travel with this series TBH. > This allows us to get rid of duplicated code > in the drivers and fix the unregistration part as well, which none of the > drivers have done until now. This series adds more code than it removes, and the unregistration is not a fix as we don't ever remove the EM tables by design, so not sure either of these points are valid arguments. > This would also make the registration with EM core to happen only after policy > is fully initialized, and the EM core can do other stuff from in there, like > marking frequencies as inefficient (WIP). Though this patchset is useful without > that work being done and should be merged nevertheless. > > This doesn't update scmi cpufreq driver for now as it is a special case and need > to be handled differently. Though we can make it work with this if required. Note that we'll have more 'special cases' if other architectures start using PM_EM, which is what we have been trying to allow since the beginning, so that's worth keeping in mind. Thanks, Quentin