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Date:   Wed, 11 Aug 2021 16:14:45 +0100
Message-ID: <87im0c9foa.wl-maz@kernel.org>
From:   Marc Zyngier <maz@kernel.org>
To:     Thomas Gleixner <tglx@linutronix.de>
Cc:     Valentin Schneider <valentin.schneider@arm.com>,
        linux-kernel@vger.kernel.org, linux-rt-users@vger.kernel.org,
        Will Deacon <will@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Sebastian Andrzej Siewior <bigeasy@linutronix.de>,
        Mel Gorman <mgorman@techsingularity.net>,
        Ard Biesheuvel <ardb@kernel.org>
Subject: Re: [SPLAT 2/3] irqchip/gic-v3-its: Sleeping spinlocks down gic_reserve_range()
In-Reply-To: <87a6lop3mi.ffs@tglx>
References: <20210810134127.1394269-1-valentin.schneider@arm.com>
        <20210810134127.1394269-3-valentin.schneider@arm.com>
        <87y2989xhh.wl-maz@kernel.org>
        <87a6lop3mi.ffs@tglx>
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On Wed, 11 Aug 2021 13:28:21 +0100,
Thomas Gleixner <tglx@linutronix.de> wrote:
> 
> On Wed, Aug 11 2021 at 09:50, Marc Zyngier wrote:
> > On Tue, 10 Aug 2021 14:41:26 +0100,
> > Valentin Schneider <valentin.schneider@arm.com> wrote:
> > The issue is that although the redistributor tables have been
> > allocated ahead of time (outside of any cpuhp callback), they cannot
> > be programmed into the RDs until the corresponding CPUs have been
> > brought up (the registers may not be accessible).
> >
> > For the same reason, we don't know whether we can free them (because
> > there is already a table programmed there) or have to reserve them
> > with an efi_mem_reserve_persistent() call. efi_mem_reserve_iomem()
> > uses GFP_ATOMIC for its allocation, but this is not sufficient for RT
> > anymore.
> >
> > We could postpone the reservation of the memory to a later point (it
> > is only useful for kexec), but it isn't clear where that point is. The
> > CPU is not quite up yet, and we can't easily IPI the boot CPU to do
> > the reserve call.
> 
> Right, but don't you know about the need for reservation _before_
> bringing the CPU up?

Unfortunately not. To find out, you need to access a pair of per-CPU
registers which are not guaranteed to be powered-on until the
corresponding CPU has made it into the kernel (the firmware will power
things on as part of bringing the CPU up).

Which is why we always allocate the memory upfront for all the CPUs,
and each CPU either frees the memory if it already had something in
its redistributor, or point the redistributor to the memory and
reserves it.

This is probably the most epic fail of the GICv3 architecture...

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.