Received: by 2002:a05:6a10:c604:0:0:0:0 with SMTP id y4csp402086pxt; Thu, 12 Aug 2021 00:49:19 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxWKI00z75BKfpfMLyhuNUfhYNGMhE5FKr+57Mm+/teYW5vWHO+odoZ43tGKA4WtgkIX/Ry X-Received: by 2002:a05:6402:2889:: with SMTP id eg9mr4073047edb.38.1628754558986; Thu, 12 Aug 2021 00:49:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1628754558; cv=none; d=google.com; s=arc-20160816; b=m//TWXOvXeuQD7fcm8ZJkSbbnSl9RWy1b8kMBimtmdyZZtOH6z86ok1Qd8QtRvFWuT DeJ7eZ9SCozAr0IRVhpPhMdF1orEUb9m9eaIY5hAU8UiyHdQ++30hB3n61gi4jhTEiO4 9CGutE6TIU8cZ+IxBdDxX6bQ4BC01S0FqMxpbJYwFVlkG5gBnAXFmgGpulTDzAFuvgvd DEKecAVFWIr/YsViyPKDcT+RvChzp4y4Bl2wkaKhBqFmghp45uB4rJIgn9MLdMXCR56o vrxNVzhHXpdB1ynWsOgF7WW3QVxTt6HJdW+W0F35EGyK0V6NHqtF7WurZKsrtvMTu6LV X2Kw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=6RPVC9wpLWkH/K7RKhXGMjsgl5Vhv3RPjPTkAQ/dcvc=; b=BRQe3WangcVMqDwVhVmzjkgbndqoegvD/EVFZIdd2ydhyVBZvka0bO6cyzZ8boQ5Zo hviTy8tDA3hM0CeldkYJc6IRQK2rI0MohXpc+fSWmATT0A0iKfY032SWxIQG80DqXjS2 w5dQMDg52EHTnlQBlAmW9vUsKlLz85q/Sf+61xAB6NwTVGbZ5KZovrvKcR6F8kpZRuH2 kZVFrf7qtVHkphBYcqRrTncMqHEtyVN1yTYKJ3xqE9Ur5VPj6h77ydsIoiGHGdCZ56Yu hpGs5MoOceX2iFHivNLe1/a0SRc7pk0+E55G37s4v36A5Bl4Q821eJOWTuMjHmeLQ+HU flxg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id e4si1805112ejs.733.2021.08.12.00.48.55; Thu, 12 Aug 2021 00:49:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234965AbhHLHnW (ORCPT + 99 others); Thu, 12 Aug 2021 03:43:22 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:34292 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234888AbhHLHnQ (ORCPT ); Thu, 12 Aug 2021 03:43:16 -0400 Received: from ironmsg-lv-alpha.qualcomm.com ([10.47.202.13]) by alexa-out.qualcomm.com with ESMTP; 12 Aug 2021 00:42:52 -0700 X-QCInternal: smtphost Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by ironmsg-lv-alpha.qualcomm.com with ESMTP/TLS/AES256-SHA; 12 Aug 2021 00:42:50 -0700 X-QCInternal: smtphost Received: from rajpat-linux.qualcomm.com ([10.206.21.0]) by ironmsg01-blr.qualcomm.com with ESMTP; 12 Aug 2021 13:12:20 +0530 Received: by rajpat-linux.qualcomm.com (Postfix, from userid 2344945) id A21B221508; Thu, 12 Aug 2021 13:12:18 +0530 (IST) From: Rajesh Patil To: Andy Gross , Bjorn Andersson , Rob Herring Cc: swboyd@chromium.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, rnayak@codeaurora.org, saiprakash.ranjan@codeaurora.org, msavaliy@qti.qualcomm.com, skakit@codeaurora.org, Rajesh Patil Subject: [PATCH V5 5/7] arm64: dts: sc7280: Configure debug uart for sc7280-idp Date: Thu, 12 Aug 2021 13:11:16 +0530 Message-Id: <1628754078-29779-6-git-send-email-rajpat@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1628754078-29779-1-git-send-email-rajpat@codeaurora.org> References: <1628754078-29779-1-git-send-email-rajpat@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Configure uart5 as debug uart and split the pinctrl functions to match with SoC dt. Signed-off-by: Rajesh Patil --- arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index c41c2d0..53993b3 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -254,6 +254,7 @@ }; &uart5 { + compatible = "qcom,geni-debug-uart"; status = "okay"; }; @@ -311,18 +312,14 @@ bias-pull-up; }; -&qup_uart5_default { - tx { - pins = "gpio46"; - drive-strength = <2>; - bias-disable; - }; +&qup_uart5_tx { + drive-strength = <2>; + bias-disable; +}; - rx { - pins = "gpio47"; - drive-strength = <2>; - bias-pull-up; - }; +&qup_uart5_rx { + drive-strength = <2>; + bias-pull-up; }; &sdc1_on { -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation