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Thu, 12 Aug 2021 04:46:26 -0700 (PDT) MIME-Version: 1.0 References: <1628767642-4008-1-git-send-email-rnayak@codeaurora.org> <1628767642-4008-4-git-send-email-rnayak@codeaurora.org> In-Reply-To: <1628767642-4008-4-git-send-email-rnayak@codeaurora.org> From: Ulf Hansson Date: Thu, 12 Aug 2021 13:45:49 +0200 Message-ID: Subject: Re: [PATCH v7 3/3] arm64: dts: sc7180: Add required-opps for i2c To: Rajendra Nayak Cc: Bjorn Andersson , Viresh Kumar , Linux PM , DTML , Linux Kernel Mailing List , linux-arm-msm , Stephen Boyd , Roja Rani Yarubandi , Stephan Gerhold , Dmitry Osipenko Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 12 Aug 2021 at 13:27, Rajendra Nayak wrote: > > qup-i2c devices on sc7180 are clocked with a fixed clock (19.2 MHz) > Though qup-i2c does not support DVFS, it still needs to vote for a > performance state on 'CX' to satisfy the 19.2 Mhz clock frequency > requirement. > > Use 'required-opps' to pass this information from > device tree, and also add the power-domains property to specify > the CX power-domain. > > Signed-off-by: Rajendra Nayak > Reviewed-by: Stephen Boyd Reviewed-by: Ulf Hansson Kind regards Uffe > --- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index 4721c15..c8921e2 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -790,8 +790,10 @@ > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, > <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; > interconnect-names = "qup-core", "qup-config", > "qup-memory"; > + power-domains = <&rpmhpd SC7180_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; > status = "disabled"; > }; > > spi0: spi@880000 { > @@ -842,8 +844,10 @@ > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, > <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; > interconnect-names = "qup-core", "qup-config", > "qup-memory"; > + power-domains = <&rpmhpd SC7180_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; > status = "disabled"; > }; > > spi1: spi@884000 { > @@ -894,8 +898,10 @@ > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, > <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; > interconnect-names = "qup-core", "qup-config", > "qup-memory"; > + power-domains = <&rpmhpd SC7180_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; > status = "disabled"; > }; > > uart2: serial@888000 { > @@ -928,8 +934,10 @@ > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, > <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; > interconnect-names = "qup-core", "qup-config", > "qup-memory"; > + power-domains = <&rpmhpd SC7180_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; > status = "disabled"; > }; > > spi3: spi@88c000 { > @@ -980,8 +988,10 @@ > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, > <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; > interconnect-names = "qup-core", "qup-config", > "qup-memory"; > + power-domains = <&rpmhpd SC7180_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; > status = "disabled"; > }; > > uart4: serial@890000 { > @@ -1014,8 +1024,10 @@ > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>, > <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; > interconnect-names = "qup-core", "qup-config", > "qup-memory"; > + power-domains = <&rpmhpd SC7180_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; > status = "disabled"; > }; > > spi5: spi@894000 { > @@ -1079,8 +1091,10 @@ > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>, > <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; > interconnect-names = "qup-core", "qup-config", > "qup-memory"; > + power-domains = <&rpmhpd SC7180_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; > status = "disabled"; > }; > > spi6: spi@a80000 { > @@ -1131,8 +1145,10 @@ > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>, > <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; > interconnect-names = "qup-core", "qup-config", > "qup-memory"; > + power-domains = <&rpmhpd SC7180_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; > status = "disabled"; > }; > > uart7: serial@a84000 { > @@ -1165,8 +1181,10 @@ > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>, > <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; > interconnect-names = "qup-core", "qup-config", > "qup-memory"; > + power-domains = <&rpmhpd SC7180_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; > status = "disabled"; > }; > > spi8: spi@a88000 { > @@ -1217,8 +1235,10 @@ > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>, > <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; > interconnect-names = "qup-core", "qup-config", > "qup-memory"; > + power-domains = <&rpmhpd SC7180_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; > status = "disabled"; > }; > > uart9: serial@a8c000 { > @@ -1251,8 +1271,10 @@ > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>, > <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; > interconnect-names = "qup-core", "qup-config", > "qup-memory"; > + power-domains = <&rpmhpd SC7180_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; > status = "disabled"; > }; > > spi10: spi@a90000 { > @@ -1303,8 +1325,10 @@ > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_1 0>, > <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; > interconnect-names = "qup-core", "qup-config", > "qup-memory"; > + power-domains = <&rpmhpd SC7180_CX>; > + required-opps = <&rpmhpd_opp_low_svs>; > status = "disabled"; > }; > > spi11: spi@a94000 { > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation >