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Date:   Thu, 12 Aug 2021 15:45:50 +0100
Message-ID: <87wnoq90wx.wl-maz@kernel.org>
From:   Marc Zyngier <maz@kernel.org>
To:     Valentin Schneider <valentin.schneider@arm.com>
Cc:     linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        Thomas Gleixner <tglx@linutronix.de>,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        Vincenzo Frascino <vincenzo.frascino@arm.com>
Subject: Re: [PATCH v3 05/13] genirq: Let purely flow-masked ONESHOT irqs through unmask_threaded_irq()
In-Reply-To: <875ywa944c.mognet@arm.com>
References: <20210629125010.458872-1-valentin.schneider@arm.com>
        <20210629125010.458872-6-valentin.schneider@arm.com>
        <87bl639l8n.wl-maz@kernel.org>
        <875ywa944c.mognet@arm.com>
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On Thu, 12 Aug 2021 14:36:35 +0100,
Valentin Schneider <valentin.schneider@arm.com> wrote:
> 
> On 12/08/21 08:26, Marc Zyngier wrote:
> > On Tue, 29 Jun 2021 13:50:02 +0100,
> > Valentin Schneider <valentin.schneider@arm.com> wrote:
> >> diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
> >> index ef30b4762947..e6d6d32ddcbc 100644
> >> --- a/kernel/irq/manage.c
> >> +++ b/kernel/irq/manage.c
> >> @@ -1107,7 +1107,7 @@ static void irq_finalize_oneshot(struct irq_desc *desc,
> >>  	desc->threads_oneshot &= ~action->thread_mask;
> >>  
> >>  	if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
> >> -	    irqd_irq_masked(&desc->irq_data))
> >> +	    (irqd_irq_masked(&desc->irq_data) | irqd_irq_flow_masked(&desc->irq_data)))
> >>  		unmask_threaded_irq(desc);
> >
> > The bitwise OR looks pretty odd. It is probably fine given that both
> > side of the expression are bool, but still. I can fix this locally.
> >
> 
> Thomas suggested that back in v1:
> 
>   https://lore.kernel.org/lkml/87v98v4lan.ffs@nanos.tec.linutronix.de/
> 
> I did look at the (arm64) disassembly diff back then and was convinced by
> what I saw, though I'd have to go do that again as I can't remember much
> else.

Ah, fair enough.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.