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Message-ID: <61162D89.2070901@hisilicon.com>
Date:   Fri, 13 Aug 2021 16:30:01 +0800
From:   Wei Xu <xuwei5@hisilicon.com>
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To:     Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
CC:     <linuxarm@huawei.com>, <mauro.chehab@huawei.com>,
        Rob Herring <robh+dt@kernel.org>, <devicetree@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <xuwei5@hisilicon.com>
Subject: Re: [PATCH] arm64: dts: HiSilicon: hi3660: address a PCI warning
References: <934f397d227ea589a16c89f1ee9c6f199c662093.1628666047.git.mchehab+huawei@kernel.org>
In-Reply-To: <934f397d227ea589a16c89f1ee9c6f199c662093.1628666047.git.mchehab+huawei@kernel.org>
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Hi Mauro,

On 2021/8/11 15:14, Mauro Carvalho Chehab wrote:
> When the driver is registered, it produces a warning when
> registering the PCI bridge:
> 
> 	[    5.363450] pci_bus 0000:00: root bus resource [bus 00-01]
> 	[    5.396998] pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-01] (conflicts with (null) [bus 00-01])
> 	[    5.284831] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
> 
> The reason is that the bus-range is wrong. Address it.
> 
> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>

Thanks!
Applied to the hisilicon arm64 dt tree.

Best Regards,
Wei

> ---
>  arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> index f1ec87c05842..cf2079590ad8 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
> @@ -1002,7 +1002,7 @@ pcie@f4000000 {
>  			      <0x0 0xf3f20000 0x0 0x40000>,
>  			      <0x0 0xf5000000 0x0 0x2000>;
>  			reg-names = "dbi", "apb", "phy", "config";
> -			bus-range = <0x0  0x1>;
> +			bus-range = <0x0  0xff>;
>  			#address-cells = <3>;
>  			#size-cells = <2>;
>  			device_type = "pci";
>