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From:   Vladimir Oltean <vladimir.oltean@nxp.com>
To:     Hongbo Wang <hongbo.wang@nxp.com>
CC:     Andrew Lunn <andrew@lunn.ch>, Hongjun Chen <hongjun.chen@nxp.com>,
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Subject: Re: [EXT] Re: [PATCH v1] arm64: dts: fsl: ls1028a-rdb: Add dts file
 to choose swp5 as dsa master
Thread-Topic: [EXT] Re: [PATCH v1] arm64: dts: fsl: ls1028a-rdb: Add dts file
 to choose swp5 as dsa master
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Date:   Fri, 13 Aug 2021 14:07:46 +0000
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On Fri, Aug 13, 2021 at 01:56:53PM +0000, Hongbo Wang wrote:
> > You will end up with two DT blobs with the same top level compatible. T=
his is
> > going to cause confusion. I suggest you add an additional top level com=
patible
> > to make it clear this differs from the compatible =3D "fsl,ls1028a-rdb"=
,
> > "fsl,ls1028a" blob.
> >
> >    Andrew
>
> hi Andrew,
>
>   thanks for comments.
>
>   this "fsl-ls1028a-rdb-dsa-swp5-eno3.dts" is also for fsl-ls1028a-rdb pl=
atform,
> the only difference with "fsl-ls1028a-rdb.dts" is that it use swp5 as dsa=
 master, not swp4,
> and it's based on "fsl-ls1028a-rdb.dts", so I choose this manner,
> if "fsl-ls1028a-rdb.dts" has some modification for new version, this file=
 don't need be changed.

I tend to agree with Hongbo. What confusion is it going to cause? It is
fundamentally the same board, just an Ethernet port stopped having
'status =3D "disabled"' and another changed role, all inside of the SoC
with no externally-visible change. If anything, I think that creating a
new top-level compatible for each small change like this would create a
bloat-fest of its own.

I was going to suggest as an alternative to define a device tree overlay
file with the changes in the CPU port assignment, instead of defining a
wholly new DTS for the LS1028A reference design board. But I am pretty
sure that it is not possible to specify a /delete-property/ inside a
device tree overlay file, so that won't actually work.=