Received: by 2002:a05:6a10:c7d3:0:0:0:0 with SMTP id h19csp1346399pxy; Sun, 15 Aug 2021 18:22:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwN1FBTedXw9Dqfnkuq1AhRL+/XAxM5utFZOiLtkHH3WFwFRT1I/hSLYki6FFKX/QWJX2EK X-Received: by 2002:a05:6402:17d7:: with SMTP id s23mr16750209edy.344.1629076923714; Sun, 15 Aug 2021 18:22:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1629076923; cv=none; d=google.com; s=arc-20160816; b=wPu7eM78c/ydvrk2yHwp4k34Es52JW1dZg9OLX7Sd3U///gNlwG16e8vkxuh7PxPrY 3Dc49oLjC19lwBG+br6/Hyp2WmkK4zye9I5nPWmtlWZUw3dZq9mDkQmNQBvSH7XxtN4Y keR+sQZMaXFbIfyfBCuPxBvm3TQ1sLc/aERFp45nYSFzvE/KyYPJuh9ol4cYeIvCuT+q 6Szk05YW0l6ZiwVQNo+gLXZtUYPKR+E/7IzmeejBx/x08k0iFcCa9jL3856gbb1UEzfx RWOgcj0lJS1mY5R39EJhb4WQ0WL5oZlE7a6i+JC9yO4J+lzXumJuB5NeIxIZH4zNAuDi MoTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=lKzvls7SnS4MrldOG8+p3U96porQKaa0ZzMYEgwQQs4=; b=rj8uKyp0p4qbW2i2PKYnEQaJrLPqXH11lR1yeXYHNvNy60bZ1/DOmkyrUCAloQbiyV 7Gwb63t1DZl8a6TR7wWzSKN1DPbE3G3IRjUX4f3bVsaP4AaYfYhRnWXa2E3lx5R7BKY2 OlWkPwaPskARIbAl/NCewcII1HP6hDT1bK2nKeCwj6MV2kKWd3bnbsUz3TzrhE+Nm+8z 92RZNxDs86JwNsfG1hvDpv/lyIco7tJk8p7c67htYE3G6ud4GHygnHKp4z+tggUOKCaD NkYEqLLDNU3CzIX1XH74SOlmU7Gp1t7+j76oi+bKhWSyFysu1wzCT0NPH0ZVWgTdJ4cD Eosg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c15si4945050ejz.158.2021.08.15.18.21.41; Sun, 15 Aug 2021 18:22:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232594AbhHPBUk (ORCPT + 99 others); Sun, 15 Aug 2021 21:20:40 -0400 Received: from lucky1.263xmail.com ([211.157.147.132]:53254 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231738AbhHPBU0 (ORCPT ); Sun, 15 Aug 2021 21:20:26 -0400 Received: from localhost (unknown [192.168.167.16]) by lucky1.263xmail.com (Postfix) with ESMTP id 468FFFB822; Mon, 16 Aug 2021 09:19:54 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-SKE-CHECKED: 1 X-ANTISPAM-LEVEL: 2 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P26933T140041269528320S1629076790609014_; Mon, 16 Aug 2021 09:19:54 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <73d3c2060501bc2f209333a4d959d242> X-RL-SENDER: jay.xu@rock-chips.com X-SENDER: xjq@rock-chips.com X-LOGIN-NAME: jay.xu@rock-chips.com X-FST-TO: linus.walleij@linaro.org X-RCPT-COUNT: 9 X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-System-Flag: 0 From: Jianqun Xu To: linus.walleij@linaro.org, heiko@sntech.de Cc: bgolaszewski@baylibre.com, robh+dt@kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Jianqun Xu Subject: [PATCH v8 4/9] dt-bindings: gpio: change items restriction of clock for rockchip,gpio-bank Date: Mon, 16 Aug 2021 09:19:43 +0800 Message-Id: <20210816011948.1118959-5-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210816011948.1118959-1-jay.xu@rock-chips.com> References: <20210816011948.1118959-1-jay.xu@rock-chips.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In the past we only need on clock which name "pclk" for a gpio controller. In the new version gpio controller, there add some register to change debounce clock dynamic, so the dt node needs to add the second clock, we call it "dbclk". The clock property need 2 items on some rockchip chips such as RK3568 SoCs. Signed-off-by: Jianqun Xu --- v8: - fix commit author to me - add clock-names property but not require v7: - none v6: - add to this serials .../devicetree/bindings/gpio/rockchip,gpio-bank.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml index d993e002cebe..0d62c28fb58d 100644 --- a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml +++ b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml @@ -22,7 +22,10 @@ properties: maxItems: 1 clocks: - maxItems: 1 + minItems: 1 + items: + - description: APB interface clock source + - description: GPIO debounce reference clock source gpio-controller: true -- 2.25.1