Received: by 2002:a05:6a10:1d13:0:0:0:0 with SMTP id pp19csp103996pxb; Mon, 16 Aug 2021 00:41:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyn7D0BViLiwB0l7sGHzZtrNEgoB0Ft33TAm5vvURCbqvjvXNk0O44EoW3LYFBdc5hZMokM X-Received: by 2002:a5d:9b99:: with SMTP id r25mr12088916iom.104.1629099675909; Mon, 16 Aug 2021 00:41:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1629099675; cv=none; d=google.com; s=arc-20160816; b=hCQyyAmpPMraehtA4or3SS5iIxWGrNDez/g47c9pysC8AnIVTIqeUCN0wF4qAci2b2 rJ3Bjz464Aa5F1B+dW1Z3g7LgH4NnpF6zcQW/+IxqDIQ3j+THP/on4yL7+x5ISyXEbHS ZZNLZNH+u5RKrTzy+U68K7apbNObHjKP7tor63TuyotgJlWlluZ2I3SBnGsWvxxB3/0O jWnlEPc/ATs5JhxPGG0xcPi1PT1ym8VwxtwV0nhAEYafYvwJYkkaTH7zyGyXQvk7Pu0r 4TlbQbDeCYXINpU8VeK0zJbph0oF2O+F3o8K9wP4Vx29fOSsNitpu18cK9CHJoRrtQ3C 5ibQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from; bh=Mooc4pSlkH0kGELUmT8rYB8LD2j8lLSS9Z+sPHhMPkI=; b=z4gMxh9uI4HvMYhx/c7wxgp9NYdy8btCUgy06hTR1OUX/csGN8bwW5/VyxmbsTLqUJ 2AaikMe3eHBee+xHXpbXS7uLF68PR1tfRxhiDrX5jHFVTuFsU8yvutI/MoAXASOKzBgW 33EB7d0F9darLZvWLEdYWk4DfJcGPKiqEVWFJgDAXT4aJEXn9J6RXhjVch2bVVYWicSJ wS+KRau0Pq7FmLLIap1VdA4Qy7OiWtz7R+C7LLq/C0u+IoJQZ7iDh3LnBLDobBT6H85S QhLh/9FT6YLXw2VlBSqKCK8p8c3U80hceuHQ3DLRTefFU7HQYOOV8x9jFXIhA8G1L27g UsaA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h14si10581438ile.129.2021.08.16.00.41.04; Mon, 16 Aug 2021 00:41:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234321AbhHPHjs (ORCPT + 99 others); Mon, 16 Aug 2021 03:39:48 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:50216 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S233725AbhHPHjr (ORCPT ); Mon, 16 Aug 2021 03:39:47 -0400 X-UUID: ddc78e7cede847719bbbc67db851edb8-20210816 X-UUID: ddc78e7cede847719bbbc67db851edb8-20210816 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1020425944; Mon, 16 Aug 2021 15:39:13 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs06n1.mediatek.inc (172.21.101.129) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 16 Aug 2021 15:39:12 +0800 Received: from localhost.localdomain (10.15.20.246) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 16 Aug 2021 15:39:11 +0800 From: Mason Zhang To: Chaotian Jing , Ulf Hansson , Matthias Brugger CC: , , , , , Mason Zhang Subject: [PATCH 1/1] mmc: mediatek: fixed clk contrl flow Date: Mon, 16 Aug 2021 15:38:14 +0800 Message-ID: <20210816073813.11715-1-Mason.Zhang@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org this patch fixed clk contrl flow in set clk rate, no need close clk src, gate cg is enough, so no need call clk prepare/unprepare. Signed-off-by: Mason Zhang --- drivers/mmc/host/mtk-sd.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 4dfc246c5f95..d9835b272c1f 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -895,9 +895,9 @@ static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz) * So if want to only gate src_clk, need gate its parent(mux). */ if (host->src_clk_cg) - clk_disable_unprepare(host->src_clk_cg); + clk_disable(host->src_clk_cg); else - clk_disable_unprepare(clk_get_parent(host->src_clk)); + clk_disable(clk_get_parent(host->src_clk)); if (host->dev_comp->clk_div_bits == 8) sdr_set_field(host->base + MSDC_CFG, MSDC_CFG_CKMOD | MSDC_CFG_CKDIV, @@ -907,9 +907,9 @@ static void msdc_set_mclk(struct msdc_host *host, unsigned char timing, u32 hz) MSDC_CFG_CKMOD_EXTRA | MSDC_CFG_CKDIV_EXTRA, (mode << 12) | div); if (host->src_clk_cg) - clk_prepare_enable(host->src_clk_cg); + clk_enable(host->src_clk_cg); else - clk_prepare_enable(clk_get_parent(host->src_clk)); + clk_enable(clk_get_parent(host->src_clk)); while (!(readl(host->base + MSDC_CFG) & MSDC_CFG_CKSTB)) cpu_relax(); -- 2.18.0