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[23.128.96.18]) by mx.google.com with ESMTP id mp29si1084428ejc.290.2021.08.16.22.46.07; Mon, 16 Aug 2021 22:46:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=a6IvKzyO; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234139AbhHQFpA (ORCPT + 99 others); Tue, 17 Aug 2021 01:45:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48552 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234233AbhHQFo7 (ORCPT ); Tue, 17 Aug 2021 01:44:59 -0400 Received: from mail-lj1-x232.google.com (mail-lj1-x232.google.com [IPv6:2a00:1450:4864:20::232]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C3899C0613C1 for ; Mon, 16 Aug 2021 22:44:26 -0700 (PDT) Received: by mail-lj1-x232.google.com with SMTP id h11so30995605ljo.12 for ; Mon, 16 Aug 2021 22:44:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=YOKejl87y0ski0VdMRkyNRA2v7H+vqyupx7Esp13/wE=; b=a6IvKzyOyIQZqQYz+g/aLPoRbm5h20bCZsjIxf2QcwFz0VIyf7oEIDWaVkrgyH8dVy h4m6QRA7pfehKCUKoALq+XGDZt5U7OBbb0gKEDtP7fuIogf7goHUm/xLrW3OSFHRYE/2 l/S0skrt0NKW06MSkEcsSsY+vfCoBhM6F24NE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=YOKejl87y0ski0VdMRkyNRA2v7H+vqyupx7Esp13/wE=; b=bEO7cT5jyenpyWy4iWu36qkI8KxpAghA7kFFwQMbj/KA5MeJAz1R1S1GXKWGe7ryje EHUj7+uka4awX53z0WiSFzcptGr57IFZS8ZrWWbxE7m75n7KkLrRT7P4iNh3pq3p4QCE sZIbLUEsTbgE0HwcMnL3XrO6g7cI63/2gexLiYE9zFVQ7RCQ/U2KhFWV5ZOw/LYKlBKp vpwp6HSx/5Q666CsEapl55F+X9y56cegw1RXOVVe+NTAALN0Mx5qPEG24+xxNLViW8Pi M/Td3Pm21V7u+u0QS67jA8CGVxU+BHOrFVfAYmUXabzQ85ywKznQ6PqsLh3AHRm8m9L9 FoqA== X-Gm-Message-State: AOAM532E8Dvn2faPowTNElDySuYjSLu+UcfzmH+jLGUOx1Pm+RVm4xu8 q9dKpGG+VjSDJDOQ7sYBm2S79LgCJKgoa7sbnHzWcA== X-Received: by 2002:a05:651c:1785:: with SMTP id bn5mr1677465ljb.18.1629179065185; Mon, 16 Aug 2021 22:44:25 -0700 (PDT) MIME-Version: 1.0 References: <20210710081722.1828-1-zhiyong.tao@mediatek.com> <20210710081722.1828-2-zhiyong.tao@mediatek.com> <1626940470.29611.9.camel@mhfsdcap03> <07388dac4e25e0f260725e8f80ba099d5aa80949.camel@mediatek.com> <4fd12d5c53f6492e5fa3ba94a78b9a149f5b6ed9.camel@mediatek.com> In-Reply-To: From: Chen-Yu Tsai Date: Tue, 17 Aug 2021 13:44:13 +0800 Message-ID: Subject: Re: [PATCH v10 1/2] dt-bindings: pinctrl: mt8195: add rsel define To: "zhiyong.tao" Cc: Linus Walleij , Rob Herring , Mark Rutland , Matthias Brugger , Sean Wang , srv_heupstream , hui.liu@mediatek.com, Eddie Huang , Light Hsieh , Biao Huang , Hongzhou Yang , Sean Wang , Seiya Wang , Devicetree List , LKML , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "moderated list:ARM/Mediatek SoC support" , "open list:GPIO SUBSYSTEM" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Aug 17, 2021 at 10:21 AM zhiyong.tao wrote: > > On Tue, 2021-08-17 at 01:00 +0200, Linus Walleij wrote: > > On Mon, Aug 16, 2021 at 5:38 PM Chen-Yu Tsai > > wrote: > > > On Mon, Aug 16, 2021 at 6:48 PM zhiyong.tao < > > > zhiyong.tao@mediatek.com> wrote: > > > > > I'll take that as "use SI units whenever possible and > > > > > reasonable". > > > > > > > > ==> so It doesn't need to change the define, is it right? > > > > we will keep the common define. > > > > > > Actually I think it would be possible and reasonable to use SI > > > units > > > in this case, since you are the vendor and have the resistor values > > > to implement the support. Having different sets of values for > > > different > > > chips is nothing out of the ordinary. We already have to account > > > for > > > different number of pins and different pin functions. That is what > > > compatible strings are for. > > > > I fully agree with Chen-Yu's analysis here. > > > > Zhiyong can you make an attempt to use SI units (Ohms) and see > > what it will look like? I think it will look better for users and it > > will > > be less risk to make mistakes. > > > > Yours, > > Linus Walleij > > Hi Linus & chen-yu, > > The rsel actual bias resistance of each setting is different in > different IC. For example, in mt8195, the rsel actual bias resistance > setting like as: > MTK_PULL_SET_RSEL_000:75K in PU, 75k in PD; > MTK_PULL_SET > _RSEL_001:10k in PU, 5k in PD; > MTK_PULL_SET_RSEL_010:5k in PU, 75k in > PD; > MTK_PULL_SET_RSEL_011:4k in PU, 5K in PD; > MTK_PULL_SET_RSEL_100:3k in > PU, 75k in PD; > MTK_PULL_SET_RSEL_101:2k in PU, 5K in PD; > MTK_PULL_SET_RSE > L_110:1.5k in PU, 75k in PD; > MTK_PULL_SET_RSEL_111:1k in PU, 5k in PD. > > but in mt8192, the rsel actual bias resistance setting like as: > MTK_PULL_SET_RSEL_000:75K in PU, 75k in PD; > MTK_PULL_SET_RSEL_001:3k in PU, 5k in PD; > MTK_PULL_SET_RSEL_010:10k in PU, 75k in PD; > MTK_PULL_SET_RSEL_011:1k in PU, 5K in PD; > > Can you help me to provide a suggestion common define for the all > different IC? > It seems that we should add a new define, if we upstream a new IC > pinctrl driver in the future. I assume you mean the macros used in the device tree? The point of using SI units is to get rid of the macros. Instead of: bias-pull-up = ; and bias-pull-down = ; We want: bias-pull-up = <75000>; and bias-pull-down = <5000>; And the pinctrl driver then converts the real values in the device tree into register values using some lookup table. The DT schema could then enumerate all the valid resistor values, and get proper validity checking. Now if you really wanted to keep some symbols for mapping hardware register values to resistor values, you could have #define MT8192_PULL_UP_RSEL_001 75000 #define MT8192_PULL_DOWN_RSEL_001 5000 or have them all named MTK_PULL_{UP,DOWN}_RSEL_NNN, but split into different header files, one per SoC. Personally I think having the macros is a bad idea if proper values are available. It just adds another layer of indirection, and another area where errors can creep in. Regards ChenYu