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References: <20210804181329.2899708-1-sathyanarayanan.kuppuswamy@linux.intel.com> <20210804181329.2899708-2-sathyanarayanan.kuppuswamy@linux.intel.com> From: Juergen Gross Subject: Re: [PATCH v5 01/12] x86/paravirt: Move halt paravirt calls under CONFIG_PARAVIRT Message-ID: <057170db-9382-eb40-7bcb-4ec1de4aae62@suse.com> Date: Tue, 17 Aug 2021 14:50:47 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="DoVWBTuFNc16vBqHEhWLIUVc6TJhrBXCt" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --DoVWBTuFNc16vBqHEhWLIUVc6TJhrBXCt Content-Type: multipart/mixed; boundary="T7R9XNbCG5R9WfDROjZnK92MyENX0KhdF"; protected-headers="v1" From: Juergen Gross To: Borislav Petkov , Kuppuswamy Sathyanarayanan Cc: Thomas Gleixner , Ingo Molnar , Peter Zijlstra , Andy Lutomirski , Peter H Anvin , Dave Hansen , Tony Luck , Dan Williams , Andi Kleen , Kirill Shutemov , Sean Christopherson , Kuppuswamy Sathyanarayanan , x86@kernel.org, linux-kernel@vger.kernel.org, Deep Shah , "VMware, Inc." Message-ID: <057170db-9382-eb40-7bcb-4ec1de4aae62@suse.com> Subject: Re: [PATCH v5 01/12] x86/paravirt: Move halt paravirt calls under CONFIG_PARAVIRT References: <20210804181329.2899708-1-sathyanarayanan.kuppuswamy@linux.intel.com> <20210804181329.2899708-2-sathyanarayanan.kuppuswamy@linux.intel.com> In-Reply-To: --T7R9XNbCG5R9WfDROjZnK92MyENX0KhdF Content-Type: multipart/mixed; boundary="------------291295DA05027265755CEFC3" Content-Language: en-US This is a multi-part message in MIME format. --------------291295DA05027265755CEFC3 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: quoted-printable On 12.08.21 09:18, Borislav Petkov wrote: > On Wed, Aug 04, 2021 at 11:13:18AM -0700, Kuppuswamy Sathyanarayanan wr= ote: >> From: "Kirill A. Shutemov" >> >> CONFIG_PARAVIRT_XXL is mainly defined/used by XEN PV guests. For >> other VM guest types, features supported under CONFIG_PARAVIRT >> are self sufficient. CONFIG_PARAVIRT mainly provides support for >> TLB flush operations and time related operations. >> >> For TDX guest as well, paravirt calls under CONFIG_PARVIRT meets >> most of its requirement except the need of HLT and SAFE_HLT >> paravirt calls, which is currently defined under >> COFNIG_PARAVIRT_XXL. >> >> Since enabling CONFIG_PARAVIRT_XXL is too bloated for TDX guest >> like platforms, move HLT and SAFE_HLT paravirt calls under >> CONFIG_PARAVIRT. >> >> Moving HLT and SAFE_HLT paravirt calls are not fatal and should not >> break any functionality for current users of CONFIG_PARAVIRT. >> >> Co-developed-by: Kuppuswamy Sathyanarayanan >> Signed-off-by: Kuppuswamy Sathyanarayanan >> Signed-off-by: Kirill A. Shutemov >> Reviewed-by: Andi Kleen >> Reviewed-by: Tony Luck >> --- >=20 > You need to do this before sending your patches: >=20 > ./scripts/get_maintainer.pl /tmp/tdx.01 > Thomas Gleixner (maintainer:X86 ARCHITECTURE (32-B= IT AND 64-BIT),commit_signer:1/6=3D17%) > Ingo Molnar (maintainer:X86 ARCHITECTURE (32-BIT AND= 64-BIT)) > Borislav Petkov (maintainer:X86 ARCHITECTURE (32-BIT AND= 64-BIT),commit_signer:6/6=3D100%) > x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)) > "H. Peter Anvin" (reviewer:X86 ARCHITECTURE (32-BIT AND= 64-BIT)) > Juergen Gross (supporter:PARAVIRT_OPS INTERFACE,commi= t_signer:5/6=3D83%,authored:5/6=3D83%,added_lines:15/16=3D94%,removed_lin= es:38/39=3D97%) > Deep Shah (supporter:PARAVIRT_OPS INTERFACE) > "VMware, Inc." (supporter:PARAVIRT_OPS INTERFAC= E) > ... >=20 > and CC also the supporters - I'm pretty sure at least Juergen would lik= e > to be kept up-to-date on pv changes. I'll CC him and the others now and= > leave in the whole diff but make sure you do that in the future please.= >=20 >> arch/x86/include/asm/irqflags.h | 40 +++++++++++++++----------= -- >> arch/x86/include/asm/paravirt.h | 20 +++++++------- >> arch/x86/include/asm/paravirt_types.h | 3 +- >> arch/x86/kernel/paravirt.c | 4 ++- >> 4 files changed, 36 insertions(+), 31 deletions(-) >> >> diff --git a/arch/x86/include/asm/irqflags.h b/arch/x86/include/asm/ir= qflags.h >> index c5ce9845c999..f3bb33b1715d 100644 >> --- a/arch/x86/include/asm/irqflags.h >> +++ b/arch/x86/include/asm/irqflags.h >> @@ -59,6 +59,28 @@ static inline __cpuidle void native_halt(void) >> =20 >> #endif >> =20 >> +#ifndef CONFIG_PARAVIRT >> +#ifndef __ASSEMBLY__ >> +/* >> + * Used in the idle loop; sti takes one instruction cycle >> + * to complete: >> + */ >> +static inline __cpuidle void arch_safe_halt(void) >> +{ >> + native_safe_halt(); >> +} >> + >> +/* >> + * Used when interrupts are already enabled or to >> + * shutdown the processor: >> + */ >> +static inline __cpuidle void halt(void) >> +{ >> + native_halt(); >> +} >> +#endif /* __ASSEMBLY__ */ >> +#endif /* CONFIG_PARAVIRT */ >> + >> #ifdef CONFIG_PARAVIRT_XXL >> #include Did you test this with CONFIG_PARAVIRT enabled and CONFIG_PARAVIRT_XXL disabled? I'm asking because in this case I don't see where halt() and arch_safe_halt() would be defined in case someone is including asm/irqflags.h and not asm/paravirt.h. >> #else >> @@ -80,24 +102,6 @@ static __always_inline void arch_local_irq_enable(= void) >> native_irq_enable(); >> } >> =20 >> -/* >> - * Used in the idle loop; sti takes one instruction cycle >> - * to complete: >> - */ >> -static inline __cpuidle void arch_safe_halt(void) >> -{ >> - native_safe_halt(); >> -} >> - >> -/* >> - * Used when interrupts are already enabled or to >> - * shutdown the processor: >> - */ >> -static inline __cpuidle void halt(void) >> -{ >> - native_halt(); >> -} >> - >> /* >> * For spinlocks, etc: >> */ >> diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/pa= ravirt.h >> index da3a1ac82be5..d323a626c7a8 100644 >> --- a/arch/x86/include/asm/paravirt.h >> +++ b/arch/x86/include/asm/paravirt.h >> @@ -97,6 +97,16 @@ static inline void paravirt_arch_exit_mmap(struct m= m_struct *mm) >> PVOP_VCALL1(mmu.exit_mmap, mm); >> } >> =20 >> +static inline void arch_safe_halt(void) >> +{ >> + PVOP_VCALL0(irq.safe_halt); >> +} >> + >> +static inline void halt(void) >> +{ >> + PVOP_VCALL0(irq.halt); >> +} >> + >> #ifdef CONFIG_PARAVIRT_XXL >> static inline void load_sp0(unsigned long sp0) >> { >> @@ -162,16 +172,6 @@ static inline void __write_cr4(unsigned long x) >> PVOP_VCALL1(cpu.write_cr4, x); >> } >> =20 >> -static inline void arch_safe_halt(void) >> -{ >> - PVOP_VCALL0(irq.safe_halt); >> -} >> - >> -static inline void halt(void) >> -{ >> - PVOP_VCALL0(irq.halt); >> -} >> - >> static inline void wbinvd(void) >> { >> PVOP_ALT_VCALL0(cpu.wbinvd, "wbinvd", ALT_NOT(X86_FEATURE_XENPV)); >> diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/= asm/paravirt_types.h >> index d9d6b0203ec4..40082847f314 100644 >> --- a/arch/x86/include/asm/paravirt_types.h >> +++ b/arch/x86/include/asm/paravirt_types.h >> @@ -150,10 +150,9 @@ struct pv_irq_ops { >> struct paravirt_callee_save save_fl; >> struct paravirt_callee_save irq_disable; >> struct paravirt_callee_save irq_enable; >> - >> +#endif >> void (*safe_halt)(void); >> void (*halt)(void); >> -#endif >> } __no_randomize_layout; >> =20 >> struct pv_mmu_ops { >> diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c >> index 04cafc057bed..124e0f6c5d1c 100644 >> --- a/arch/x86/kernel/paravirt.c >> +++ b/arch/x86/kernel/paravirt.c >> @@ -283,9 +283,11 @@ struct paravirt_patch_template pv_ops =3D { >> .irq.save_fl =3D __PV_IS_CALLEE_SAVE(native_save_fl), >> .irq.irq_disable =3D __PV_IS_CALLEE_SAVE(native_irq_disable), >> .irq.irq_enable =3D __PV_IS_CALLEE_SAVE(native_irq_enable), >> +#endif /* CONFIG_PARAVIRT_XXL */ >> + >> + /* Irq HLT ops. */ >=20 > What's that comment for? I agree, please drop it. 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