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[23.128.96.18]) by mx.google.com with ESMTP id w16si4757435edc.400.2021.08.17.20.40.27; Tue, 17 Aug 2021 20:40:49 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="M4aL//HW"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236105AbhHRDia (ORCPT + 99 others); Tue, 17 Aug 2021 23:38:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236111AbhHRDi2 (ORCPT ); Tue, 17 Aug 2021 23:38:28 -0400 Received: from mail-pf1-x42f.google.com (mail-pf1-x42f.google.com [IPv6:2607:f8b0:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAD58C0613CF for ; Tue, 17 Aug 2021 20:37:54 -0700 (PDT) Received: by mail-pf1-x42f.google.com with SMTP id x16so772299pfh.2 for ; Tue, 17 Aug 2021 20:37:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=CIqXxZQMTfYf4KMWVdTMecbn2bp1Cy3dF+snZnUCor0=; b=M4aL//HWus/ItMfUDjKFkNtL6bXZ+RaJqIQS2scGji60+vB4vhgzGtpnPTCO8fvrTr bRLJwf0SDFdMZh0b/z/T/Og7loudWl/gY4/scDaiXq1N26UH19zvEEaYg7MUJPpqlZ3a XIjQdgc3G77Tm5K/f/fwD4RNjzVcbQuyCAA1yeavivJz/6xpvhUO1/iN/tvjYjCm6zcF XUdaKe/Ty30DX5wiDKtJ2KAg45mm3+ec7gc7O8Yofn+L/rATdz0E4/I4j0pPKqYf7cVx q0BUYgmvmVqdgwBgSalrYNsB0z/TU8At6SFePmn/lJPAGBhCujBgA3Gd6b917AqUxklw M5Sw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=CIqXxZQMTfYf4KMWVdTMecbn2bp1Cy3dF+snZnUCor0=; b=jnNNJQC7eewNc1Sw5ab9JBJJTRzU1jre7KlK8LICjpNVWVB4rR8QaeSpIuqfaqgRWO lChFq1EGhs4vhyqIPGkR4UckVAgvRhtki+ODnQrExK7VD3U/oLpCcI2kMlUMNDnMHrdX myxCZmRgSpk5XhX8ciX4VPqq+gt4n7Hkqtc+83B6FGrhJuHuctXaMJlwY+EPp1Sjr8AR NlAHD9/ma7e9Vf3s2zX6+G6pQy1cg67i3uaRZhvgquQCvGckZjn7KiZMIs/kbyUbK0ES qwWTS3l2XsbVRz4sdr3pDCCUKFO4WobLGyXf9iRe8mTpBdpaOD6m+ZzwioFT/44INXTP 1tXg== X-Gm-Message-State: AOAM533ZqBh+phTQSohMXzRUTKBcSbI6X7jbOQLs2Z1k7U8PBIu0g3Xy J8AyADMp+y4KILixVVFLKZOtoQ== X-Received: by 2002:a65:64d1:: with SMTP id t17mr6676899pgv.291.1629257874429; Tue, 17 Aug 2021 20:37:54 -0700 (PDT) Received: from localhost ([122.172.201.85]) by smtp.gmail.com with ESMTPSA id h22sm4018298pfv.76.2021.08.17.20.37.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Aug 2021 20:37:53 -0700 (PDT) Date: Wed, 18 Aug 2021 09:07:51 +0530 From: Viresh Kumar To: Thara Gopinath Cc: agross@kernel.org, bjorn.andersson@linaro.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, rjw@rjwysocki.net, robh+dt@kernel.org, steev@kali.org, tdas@codeaurora.org, mka@chromium.org, linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [Patch v5 3/6] cpufreq: qcom-cpufreq-hw: Add dcvs interrupt support Message-ID: <20210818033751.uulg5tgwfddmwp47@vireshk-i7> References: <20210809191605.3742979-1-thara.gopinath@linaro.org> <20210809191605.3742979-4-thara.gopinath@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210809191605.3742979-4-thara.gopinath@linaro.org> User-Agent: NeoMutt/20180716-391-311a52 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 09-08-21, 15:16, Thara Gopinath wrote: > Add interrupt support to notify the kernel of h/w initiated frequency > throttling by LMh. Convey this to scheduler via thermal presssure > interface. > > Signed-off-by: Thara Gopinath > --- > > v4->v5: > - Changed throttle_lock from a spinlock to mutex to take potential > race between LMh de-init sequence and reenabling of > interrupts/polling after a thermal throttle event. > - Other cosmetic fixes as pointed out by Viresh. Applied. Thanks. -- viresh