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Date:   Wed, 18 Aug 2021 11:33:26 -0500
From:   Rob Herring <robh@kernel.org>
To:     Jan =?iso-8859-1?Q?L=FCbbe?= <jlu@pengutronix.de>
Cc:     Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
        Borislav Petkov <bp@alien8.de>,
        Mauro Carvalho Chehab <mchehab@kernel.org>,
        Tony Luck <tony.luck@intel.com>,
        James Morse <james.morse@arm.com>,
        Robert Richter <rric@kernel.org>, linux-edac@vger.kernel.org,
        linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/2] MAINTAINERS: EDAC/armada_xp: include dt-bindings
Message-ID: <YR02VkXGgsF7W7OU@robh.at.kernel.org>
References: <20210817093807.59531-1-krzysztof.kozlowski@canonical.com>
 <20210817093807.59531-2-krzysztof.kozlowski@canonical.com>
 <0f5ae210aab8ef5e00172928c341c0e6c88790a2.camel@pengutronix.de>
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On Tue, Aug 17, 2021 at 12:50:22PM +0200, Jan L?bbe wrote:
> On Tue, 2021-08-17 at 11:38 +0200, Krzysztof Kozlowski wrote:
> > Include dt-bindings for Marvell Armada XP SDRAM and L2 cache ECC in the
> > EDAC-ARMADA entry.
> 
> The L2 cache binding is already described in
> Documentation/devicetree/bindings/arm/l2c2x0.yaml, so this is only for the
> SDRAM.

Fixed up and applied.

Rob