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From:   Thiago Macieira <thiago.macieira@intel.com>
To:     Borislav Petkov <bp@alien8.de>,
        "Bae, Chang Seok" <chang.seok.bae@intel.com>
CC:     "Lutomirski, Andy" <luto@kernel.org>,
        "tglx@linutronix.de" <tglx@linutronix.de>,
        "mingo@kernel.org" <mingo@kernel.org>,
        "x86@kernel.org" <x86@kernel.org>,
        "Brown, Len" <len.brown@intel.com>,
        "Hansen, Dave" <dave.hansen@intel.com>,
        "Liu, Jing2" <jing2.liu@intel.com>,
        "Shankar, Ravi V" <ravi.v.shankar@intel.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v9 12/26] x86/fpu/xstate: Use feature disable (XFD) to protect dynamic user state
Date:   Wed, 18 Aug 2021 14:04:41 -0700
Message-ID: <3399412.qF98CnctbS@tjmaciei-mobl5>
Organization: Intel Corporation
In-Reply-To: <BCC327C2-CF9F-4910-B626-315E515E9A3A@intel.com>
References: <20210730145957.7927-1-chang.seok.bae@intel.com> <YR1HYRRN0HMTxXrw@zn.tnic> <BCC327C2-CF9F-4910-B626-315E515E9A3A@intel.com>
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On Wednesday, 18 August 2021 13:43:50 PDT Bae, Chang Seok wrote:
> > Then our API needs improving. An app should be able to ask the kernel
> > "Do you support AMX?" get a proper answer and act accordingly.
> 
> Maybe I’m missing something, but I wonder what’s the difference from
> reading  XCR0.

That assumes the kernel will always enable the bits in XCR0, like it is doing 
today and with your patch, because modifying it is a VM exit.

But it's not the only possible solution. A future kernel could decide to leave 
some bits off and only enable upon request. That's how macOS/Darwin does its 
AVX512 support.

-- 
Thiago Macieira - thiago.macieira (AT) intel.com
  Software Architect - Intel DPG Cloud Engineering