Received: by 2002:a05:6a10:1d13:0:0:0:0 with SMTP id pp19csp1073798pxb; Thu, 19 Aug 2021 19:37:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJywC4taULDiOvouvRsEJJ8Tb4VsAG7qngH7h3gh2N2e2ZCGBwaeZVRXSSJT7Vy2qyUsDu27 X-Received: by 2002:a5e:c302:: with SMTP id a2mr14507398iok.83.1629427071757; Thu, 19 Aug 2021 19:37:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1629427071; cv=none; d=google.com; s=arc-20160816; b=P/W/ZMwLO8x8Prg1QrFk1c1NIk6BJNWnftz2IykAt+xbxu96/HjzxCixcmHJrW6S3F L3VM+qPA3Q7suG2lcx3asoHHqT0yi4Et17jMElgUrbnX9whObHfgfsNM8fsGnIQDO73c YCmSV7yHk1QwYTsIoVrXbml+qFI8oUOBhL01is0lH3c9Fcos78FfaVEpZ8QzVKIyMNWt 4gn3AufZkKtGYJIGgU1cPrNnyy/fozz0V+E2kOixLXuIbKwjJJc4VDHWhGE8We9QPUBW OmirlRD3zqMQL90vNWm8//pZRtsLeBLWr2AYHSAZX2VYANtiIllwpRLMmwYka7sBwneZ voXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from; bh=T62NU/xChuhWPXookMt8JiPM+58P2IGu2n9JWbhX/Wg=; b=g494wVIYLTA4oKQk9W/a6Jb20HjFZDz8s1eaSSdTyt9uDykCjdKgPEPbI+icJc2e2o PKrfznm+GqkySBeIQerQ2XwKtn8lzxPN4DXtcUZ8EJt2L0yP0gW4KbeyTOi6czI+kMfz saECw3FOiZEKud3mlMM13kMQaDOYmubFbcPdM+f4/ykyDXsE1yecB3kP6ET+9sRwU59V mHXs3cWuJWF10ef2oBcFvLazAw2vDpX/yc8ohPIkdglXS//3cqH0FVtNr1q0bReUoBh9 u0nUtFjpxb3rt5+X0qN+H0x0ro2MFxs5mLMnNLrkujp5S/PZPiOVAWRxae8s1RS0lylU oS3Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id o4si279261iom.0.2021.08.19.19.37.40; Thu, 19 Aug 2021 19:37:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237725AbhHTCgG (ORCPT + 99 others); Thu, 19 Aug 2021 22:36:06 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:37222 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S237269AbhHTCgF (ORCPT ); Thu, 19 Aug 2021 22:36:05 -0400 X-UUID: 0c8fbe722d974c54b467120459fd7fa9-20210820 X-UUID: 0c8fbe722d974c54b467120459fd7fa9-20210820 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2033063789; Fri, 20 Aug 2021 10:35:25 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 20 Aug 2021 10:35:24 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 20 Aug 2021 10:35:22 +0800 From: Jianjun Wang To: Rob Herring , Bjorn Helgaas , Matthias Brugger , Ryder Lee CC: , , , , , Jianjun Wang , , Subject: [PATCH] dt-bindings: PCI: mediatek-gen3: Add support for MT8195 Date: Fri, 20 Aug 2021 10:35:21 +0800 Message-ID: <20210820023521.30716-1-jianjun.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MT8195 is an ARM platform SoC which has the same PCIe IP with MT8192. Signed-off-by: Jianjun Wang --- Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index 742206dbd965..dcebb1036207 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -48,7 +48,9 @@ allOf: properties: compatible: - const: mediatek,mt8192-pcie + oneOf: + - const: mediatek,mt8192-pcie + - const: mediatek,mt8195-pcie reg: maxItems: 1 -- 2.18.0