Received: by 2002:a05:6a10:1d13:0:0:0:0 with SMTP id pp19csp1410081pxb; Fri, 20 Aug 2021 05:07:10 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzrhgyXOlBAg4PjObLSPIY35Nr2s2v+9UchbCMql12bx1E8f3Clo6ZGSH4jBgv7IjL4ZnJ3 X-Received: by 2002:a50:e789:: with SMTP id b9mr21848617edn.101.1629461229737; Fri, 20 Aug 2021 05:07:09 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1629461229; cv=none; d=google.com; s=arc-20160816; b=YRSPHVBI/i09wbp5qPDvLded0BSq2dko0nRn746GU9jNg4X2idE4gx/wF7FT0ymYev iZcquMJfW0esBSjQ2Xn8Z6Y7oBa35lklbTJux6dHSZSwLJIQwdK30T1Pbaj2LtvzILkP u3Xu2Uir7g6CxRZ0OxU5SWxD4ev/AqYBmoy10abt9y9cWcHxLaL944CcCi8f5G8RyO1F 9JvuYQrclQzr74SSXME5lX/FBLEYXyO6tYf3cJCOkaBfTkhQdKCyWQwFCKKHDIQuFybE nJ6ltnlWEmYMrRFLeITk0/MMzNgtbEEcq+IpevY70obTQxGJDWsT1fwr9mLDGKckV0NQ C2Wg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :organization:references:in-reply-to:message-id:subject:cc:to:from :date; bh=hRC9ElcHYjpjaSOZe7CdYbbfUhPTXRrpne8q9SmZfXY=; b=MBoiyBgtWGrZkQEyQ+85//G/U0fo0ubLdShf6Os1jyoyf1z2QHmyZQiCbijp99eF1K mjt3GQULG7pb13IKlD5Fwzw4LtEY0kh0t2HWCsRH5ET8IE5pt0wOhX/ZsDvOxWlWUblx MZxI8JISL9MtDdZJRdxjtdf0k2YR8ZKkhQDWYfHOmqzWgR5UUo1fTFtyBSmBvMleRQuR KHzRGtD+/k05fgAhnD9J3awqVj6awg8NkmaMJzP7TM2wXuycbXBpvE3ulX3MZQmaUSnK sqwZc9xB6EFtt6oK1H++/wEhd+w2eyjs8jZkXNuPpKabkvcIIkiUCMIqzYhUWWSdyNZ7 gVnQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id g24si6395893edj.498.2021.08.20.05.05.54; Fri, 20 Aug 2021 05:07:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238179AbhHTMCx convert rfc822-to-8bit (ORCPT + 99 others); Fri, 20 Aug 2021 08:02:53 -0400 Received: from relay3-d.mail.gandi.net ([217.70.183.195]:42269 "EHLO relay3-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237764AbhHTMCw (ORCPT ); Fri, 20 Aug 2021 08:02:52 -0400 Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id C18EB60005; Fri, 20 Aug 2021 12:02:11 +0000 (UTC) Date: Fri, 20 Aug 2021 14:02:10 +0200 From: Miquel Raynal To: Apurva Nandan Cc: Richard Weinberger , Vignesh Raghavendra , Mark Brown , Patrice Chotard , Boris Brezillon , , , , Pratyush Yadav Subject: Re: [PATCH 13/13] mtd: spinand: Add support for Winbond W35N01JW SPI NAND flash Message-ID: <20210820140210.47d348dc@xps13> In-Reply-To: <64f130dc-1d87-5657-ae93-09bfdb7e93a1@ti.com> References: <20210713130538.646-1-a-nandan@ti.com> <20210713130538.646-14-a-nandan@ti.com> <20210806211423.5c9d3e96@xps13> <64f130dc-1d87-5657-ae93-09bfdb7e93a1@ti.com> Organization: Bootlin X-Mailer: Claws Mail 3.17.7 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Apurva, Apurva Nandan wrote on Fri, 20 Aug 2021 17:21:33 +0530: > Hi Miquèl, > > On 07/08/21 12:44 am, Miquel Raynal wrote: > > Hi Apurva, > > > > Apurva Nandan wrote on Tue, 13 Jul 2021 13:05:38 > > +0000: > > > >> Winbond W35N01JW is SPI NAND flash supporting Octal DTR SPI protocol. > > > > a > > > >> Add op_vairants for W35N01JW, which include the Octal DTR read/write > > > > variants > > > >> page ops as well. Add W35N01JW's oob layout functions for the > > > > OOB > > > > Okay, will correct these. > > >> mtd_ooblayout_ops. Add all op adjustments required for Octal DTR SPI > >> mode using the adjust_op(). Finally, add an entry for W35N01JW in > >> spinand_info table. > >> > >> Datasheet: https://www.winbond.com/export/sites/winbond/datasheet/W35N01JW_Datasheet_Brief.pdf > >> > > > > Maybe we can split this into two parts: > > 1/ support the chip > > 2/ add 8-D support > > > > I can split the patch into: > 1/ Add implementation of manufacturer_ops: adjust_op() to handle variations of ops in 8D-8D-8D mode > 2/ Add support/entry for Winbond W35N01JW SPI NAND flash chip > > As 8-D support has already been added in a previous patch. I also don't want the renaming to happen in the patch adding more logic. Thanks, Miquèl