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Subject: Re: [PATCH v2 2/4] PCI: brcmstb: Add ACPI config space quirk
To:     Jeremy Linton <jeremy.linton@arm.com>, linux-pci@vger.kernel.org
Cc:     lorenzo.pieralisi@arm.com, nsaenz@kernel.org, bhelgaas@google.com,
        rjw@rjwysocki.net, lenb@kernel.org, robh@kernel.org, kw@linux.com,
        sdonthineni@nvidia.com, stefan.wahren@i2se.com,
        bcm-kernel-feedback-list@broadcom.com, linux-acpi@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        linux-rpi-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
References: <20210819215655.84866-1-jeremy.linton@arm.com>
 <20210819215655.84866-3-jeremy.linton@arm.com>
From:   Florian Fainelli <f.fainelli@gmail.com>
Message-ID: <f2cc62e2-276b-e6a9-3b2c-48a61061be25@gmail.com>
Date:   Sun, 22 Aug 2021 10:52:25 +0200
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On 8/19/2021 11:56 PM, Jeremy Linton wrote:
> The PFTF CM4 is an ACPI platform that isn't ECAM compliant. Its config
> space is in two parts. One part is for the root port registers and a
> second moveable window pointing at a device's 4K config space. Thus it
> doesn't have an MCFG, and any MCFG provided would be nonsense
> anyway. Instead, a Linux specific host bridge _DSD selects a custom
> ECAM ops and cfgres. The cfg op picks between those two regions while
> disallowing problematic accesses.
> 
> Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>

Once you address Bjorn's feedback, feel free to add:

Acked-by: Florian Fainelli <f.fainelli@gmail.com>

I do wonder if squashing patches 2 and 3 would make more sense, 
otherwise we have a bcm2711_pcie_ops that is unused in patch 2.
-- 
Florian