Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Date:   Sun, 22 Aug 2021 14:38:43 +0200
From:   Marek =?UTF-8?B?QmVow7pu?= <kabel@kernel.org>
To:     Pali =?UTF-8?B?Um9ow6Fy?= <pali@kernel.org>
Cc:     Rob Herring <robh@kernel.org>,
        Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        Bjorn Helgaas <bhelgaas@google.com>, linux-pci@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH 1/3] dt-bindings: Add 'slot-power-limit' PCIe port
 property
Message-ID: <20210822143843.4f4985a4@thinkpad>
In-Reply-To: <20210820160023.3243-2-pali@kernel.org>
References: <20210820160023.3243-1-pali@kernel.org>
        <20210820160023.3243-2-pali@kernel.org>
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: quoted-printable
Precedence: bulk

On Fri, 20 Aug 2021 18:00:21 +0200
Pali Roh=C3=A1r <pali@kernel.org> wrote:

> This property specifies slot power limit in mW unit. It is form-factor and
> board specific value and must be initialized by hardware.
>=20
> Some PCIe controllers delegates this work to software to allow hardware
> flexibility and therefore this property basically specifies what should
> host bridge programs into PCIe Slot Capabilities registers.
>=20
> Property needs to be specified in mW unit, and not in special format
> defined by Slot Capabilities (which encodes scaling factor or different
> unit). Host drivers should convert value from mW unit to their format.
>=20
> Signed-off-by: Pali Roh=C3=A1r <pali@kernel.org>
> ---
>  Documentation/devicetree/bindings/pci/pci.txt | 6 ++++++
>  1 file changed, 6 insertions(+)
>=20
> diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentatio=
n/devicetree/bindings/pci/pci.txt
> index 6a8f2874a24d..e67d5db21514 100644
> --- a/Documentation/devicetree/bindings/pci/pci.txt
> +++ b/Documentation/devicetree/bindings/pci/pci.txt
> @@ -32,6 +32,12 @@ driver implementation may support the following proper=
ties:
>     root port to downstream device and host bridge drivers can do program=
ming
>     which depends on CLKREQ signal existence. For example, programming ro=
ot port
>     not to advertise ASPM L1 Sub-States support if there is no CLKREQ sig=
nal.
> +- slot-power-limit:
> +   If present this property specifies slot power limit in mW unit. Host =
drivers
> +   can parse this slot power limit and use it for programming Root Port =
or host
> +   bridge, or for composing and sending PCIe Set_Slot_Power_Limit message
> +   through the Root Port or host bridge when transitioning PCIe link fro=
m a
> +   non-DL_Up Status to a DL_Up Status.
> =20
>  PCI-PCI Bridge properties
>  -------------------------

SFP uses something similar for maximum power, but since the units are
in milliwatt, the name of the property is maximum-power-milliwatt, to
avoid problems. I think it should be done here as well, i.e.
  slot-maximum-power-milliwatt
or maybe even
  maximum-power-milliwatt.

Marek