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Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King , mir@bang-olufsen.dk, Alvin =?utf-8?Q?=C5=A0ipraga?= , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [RFC PATCH net-next 4/5] net: dsa: realtek-smi: add rtl8365mb subdriver for RTL8365MB-VC Date: Mon, 23 Aug 2021 12:37:25 +0800 Message-Id: <20210823043725.163922-1-dqfext@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210822193145.1312668-5-alvin@pqrs.dk> References: <20210822193145.1312668-1-alvin@pqrs.dk> <20210822193145.1312668-5-alvin@pqrs.dk> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Aug 22, 2021 at 09:31:42PM +0200, Alvin Šipraga wrote: > +/* Table LUT (look-up-table) address register */ > +#define RTL8365MB_TABLE_LUT_ADDR_REG 0x0502 > +#define RTL8365MB_TABLE_LUT_ADDR_ADDRESS2_MASK 0x4000 > +#define RTL8365MB_TABLE_LUT_ADDR_BUSY_FLAG_MASK 0x2000 > +#define RTL8365MB_TABLE_LUT_ADDR_HIT_STATUS_MASK 0x1000 > +#define RTL8365MB_TABLE_LUT_ADDR_TYPE_MASK 0x0800 > +#define RTL8365MB_TABLE_LUT_ADDR_ADDRESS_MASK 0x07FF FDB/MDB operations should be possible. > +/* Port isolation (forwarding mask) registers */ > +#define RTL8365MB_PORT_ISOLATION_REG_BASE 0x08A2 > +#define RTL8365MB_PORT_ISOLATION_REG(_physport) \ > + (RTL8365MB_PORT_ISOLATION_REG_BASE + (_physport)) > +#define RTL8365MB_PORT_ISOLATION_MASK 0x07FF Bridge offload should be implemented with these isolation registers. FYI: https://cdn.jsdelivr.net/gh/libc0607/Realtek_switch_hacking@files/Realtek_Unmanaged_Switch_ProgrammingGuide.pdf