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From:   "Machnikowski, Maciej" <maciej.machnikowski@intel.com>
To:     Richard Cochran <richardcochran@gmail.com>
CC:     "Kubalewski, Arkadiusz" <arkadiusz.kubalewski@intel.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
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        "gustavoars@kernel.org" <gustavoars@kernel.org>,
        "Bross, Kevin" <kevin.bross@intel.com>,
        "Stanton, Kevin B" <kevin.b.stanton@intel.com>,
        Ahmad Byagowi <abyagowi@fb.com>
Subject: RE: [RFC net-next 1/7] ptp: Add interface for acquiring DPLL state
Thread-Topic: [RFC net-next 1/7] ptp: Add interface for acquiring DPLL state
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Date:   Mon, 23 Aug 2021 08:29:14 +0000
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> -----Original Message-----
> From: Richard Cochran <richardcochran@gmail.com>
> Sent: Sunday, August 22, 2021 4:31 AM
> Subject: Re: [RFC net-next 1/7] ptp: Add interface for acquiring DPLL sta=
te
>=20
> On Fri, Aug 20, 2021 at 06:30:02PM +0000, Machnikowski, Maciej wrote:
>=20
> > Since the 40.5.2 is not applicable to higher-speed ethernet which
> > don't use auto-negotiation, but rather the link training sequence
> > where the RX side always syncs its clock to the TX side.
>=20
> By "the RX side always syncs its clock to the TX side" do you mean the RX
> channel synchronizes to the link partner's TX channel?
>=20
> Wow, that brings back the 100 megabit scheme I guess.  That's cool, becau=
se
> the same basic idea applies to the PHYTER then.
>=20

Yes! Sounds very similar! :)

> Still we are doing to need a way for user space to query the HW topology =
to
> discover whether a given ports may be syntonized from a second port.  I
> don't think your pin selection thing works unless user space can tell wha=
t the
> pins are connected to.
>=20
> Thanks,
> Richard

And a good catch! I'll update the RFC to add the query functionality and mo=
ve the SyncE logic/pins to the netdev subsystem.

Thanks=20