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(2a01cb058192e700d8d0123c2bc16888.ipv6.abo.wanadoo.fr. [2a01:cb05:8192:e700:d8d0:123c:2bc1:6888]) by smtp.gmail.com with UTF8SMTPSA id h6sm14334522wmq.5.2021.08.23.03.13.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 23 Aug 2021 03:13:53 -0700 (PDT) Message-ID: <21f8b516-8b85-e65f-1f11-bebd7bdf3b96@gmail.com> Date: Mon, 23 Aug 2021 12:13:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.0.2 Subject: Re: [RFC PATCH net-next 5/5] net: phy: realtek: add support for RTL8365MB-VC internal PHYs Content-Language: en-US To: =?UTF-8?Q?Alvin_=c5=a0ipraga?= , Linus Walleij , Andrew Lunn , Vivien Didelot , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , Rob Herring , Heiner Kallweit , Russell King Cc: mir@bang-olufsen.dk, =?UTF-8?Q?Alvin_=c5=a0ipraga?= , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20210822193145.1312668-1-alvin@pqrs.dk> <20210822193145.1312668-6-alvin@pqrs.dk> From: Florian Fainelli In-Reply-To: <20210822193145.1312668-6-alvin@pqrs.dk> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 8/22/2021 9:31 PM, Alvin Šipraga wrote: > From: Alvin Šipraga > > The RTL8365MB-VC ethernet switch controller has 4 internal PHYs for its > user-facing ports. All that is needed is to let the PHY driver core > pick up the IRQ made available by the switch driver. > > Signed-off-by: Alvin Šipraga Reviewed-by: Florian Fainelli -- Florian