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From:   Len Brown <lenb@kernel.org>
Date:   Tue, 24 Aug 2021 18:21:23 -0400
Message-ID: <CAJvTdKk6kh3yT==FFRJ0RXDSrpnWecOo06EAEgHctnWbwTg50Q@mail.gmail.com>
Subject: Re: [PATCH v9 12/26] x86/fpu/xstate: Use feature disable (XFD) to
 protect dynamic user state
To:     Borislav Petkov <bp@alien8.de>
Cc:     "Chang S. Bae" <chang.seok.bae@intel.com>,
        Andy Lutomirski <luto@kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@kernel.org>, X86 ML <x86@kernel.org>,
        "Brown, Len" <len.brown@intel.com>,
        Dave Hansen <dave.hansen@intel.com>, thiago.macieira@intel.com,
        "Liu, Jing2" <jing2.liu@intel.com>,
        "Ravi V. Shankar" <ravi.v.shankar@intel.com>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
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On Wed, Aug 18, 2021 at 12:24 PM Borislav Petkov <bp@alien8.de> wrote:

> > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> > index a7c413432b33..eac0cfd9210b 100644
> > --- a/arch/x86/include/asm/msr-index.h
> > +++ b/arch/x86/include/asm/msr-index.h
> > @@ -626,6 +626,8 @@
> >  #define MSR_IA32_BNDCFGS_RSVD                0x00000ffc
> >
> >  #define MSR_IA32_XSS                 0x00000da0
> > +#define MSR_IA32_XFD                 0x000001c4
> > +#define MSR_IA32_XFD_ERR             0x000001c5
>
> At least try to keep those numerically sorted, at least among the
> architectural MSR_IA32_ ones.

agreed

> That is, provided those XFD things are architectural...

Yes.
MSR_IA32_XFD and MSR_IA32_XFD_ERR are architectural.

(which is why they follow the convention of having an "IA32" in their name)

https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html

Len Brown, Intel Open Source Technology Center