Received: by 2002:a05:6a10:1d13:0:0:0:0 with SMTP id pp19csp679503pxb; Wed, 25 Aug 2021 12:23:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz+bHkNJ8FVw76xAvOlRA+f5D4GIpEf8JKRKSvA7K2hbsp0eokRDguddQi7cXssmt13i2TK X-Received: by 2002:a17:906:444:: with SMTP id e4mr208747eja.255.1629919404656; Wed, 25 Aug 2021 12:23:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1629919404; cv=none; d=google.com; s=arc-20160816; b=yHc4Sj78i+AhTAFC9d+3tI1Jy0BQuhFr41+1Kij5lJozaOgU84NFtRZI5HvG/2WJlZ 5fyDrAW7Dco7uk+32VgVfMnacoho+g4j/QCEVFrMjrn3LFaFoL8iEyIA4zvBVIzRTVTE cIJQyefVdiLlVMZGwkYPusYiDAJBqaBqFCgP32voDrZsq3S6yC34+ikIzlW2WzlYNdvV p9iZcjHmTe8VxGkYJwzMlu/3PlLj+5fcaXpCqiXTa9m6OPE/cvkVpG/9Epcj+cTT4ubU jqoJNWFzQZ0hKkCdeA/3yDSe2c8xZvxNosV47L/Wqct/gIqDlrTQVuHIISBlMXpBxI4D iYMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=95pB6tr679s809vePT2TB5T2GNpva4cx2GS1Tu76WBw=; b=cycds6RQjp7UKZ/67cxExqObuQ8nJubqcCjHfIeQ0rkwoVAUq5ArD+S2DojD0Zo/hm aEKgpkJhh8RrK2WLjlIJBJmHjf/DI2OBVGYhSjFNLNdbi11libk2+/5T2qD7b/BkRXow wUAoRNmrNc5Wb1+WegIF7/x8PkQmq+/PAzcH3c/JnQW1U3boC6yx2d/CNqfTaG5bICW3 J99ly8DXI9MdIeJTLUTRq80ztvcS0LtAYFh9E2uRYLfQ37ykb5Uz1yWkewwUakBjL/LX O/MVsVz2wRz/fnSvhxxRWJ0rsY6XKoY8s8rLg+300Ox/QN5/VbRh0VJAqaOylMNbxVl4 i4SQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f20si671147ejj.311.2021.08.25.12.22.59; Wed, 25 Aug 2021 12:23:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242067AbhHYQCb (ORCPT + 99 others); Wed, 25 Aug 2021 12:02:31 -0400 Received: from mga02.intel.com ([134.134.136.20]:25512 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241966AbhHYQBm (ORCPT ); Wed, 25 Aug 2021 12:01:42 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10087"; a="204750089" X-IronPort-AV: E=Sophos;i="5.84,351,1620716400"; d="scan'208";a="204750089" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Aug 2021 09:00:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,351,1620716400"; d="scan'208";a="494317320" Received: from chang-linux-3.sc.intel.com ([172.25.66.175]) by fmsmga008.fm.intel.com with ESMTP; 25 Aug 2021 09:00:47 -0700 From: "Chang S. Bae" To: bp@suse.de, luto@kernel.org, tglx@linutronix.de, mingo@kernel.org, x86@kernel.org Cc: len.brown@intel.com, lenb@kernel.org, dave.hansen@intel.com, thiago.macieira@intel.com, jing2.liu@intel.com, ravi.v.shankar@intel.com, linux-kernel@vger.kernel.org, chang.seok.bae@intel.com Subject: [PATCH v10 25/28] x86/insn/amx: Add TILERELEASE instruction to the opcode map Date: Wed, 25 Aug 2021 08:54:10 -0700 Message-Id: <20210825155413.19673-26-chang.seok.bae@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210825155413.19673-1-chang.seok.bae@intel.com> References: <20210825155413.19673-1-chang.seok.bae@intel.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Include the opcode of TILERELEASE that returns all the AMX state to INIT-state. Signed-off-by: Chang S. Bae Reviewed-by: Len Brown Cc: x86@kernel.org Cc: linux-kernel@vger.kernel.org --- Changes from v4: * Added as a new patch as preparatory to use the instruction in the kernel. --- arch/x86/lib/x86-opcode-map.txt | 8 +++++++- tools/arch/x86/lib/x86-opcode-map.txt | 8 +++++++- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt index ec31f5b60323..dbc5078ccafe 100644 --- a/arch/x86/lib/x86-opcode-map.txt +++ b/arch/x86/lib/x86-opcode-map.txt @@ -690,7 +690,9 @@ AVXcode: 2 45: vpsrlvd/q Vx,Hx,Wx (66),(v) 46: vpsravd Vx,Hx,Wx (66),(v) | vpsravd/q Vx,Hx,Wx (66),(evo) 47: vpsllvd/q Vx,Hx,Wx (66),(v) -# Skip 0x48-0x4b +# Skip 0x48 +49: Grp22 (1A) +# Skip 0x4a-0x4b 4c: vrcp14ps/d Vpd,Wpd (66),(ev) 4d: vrcp14ss/d Vsd,Hpd,Wsd (66),(ev) 4e: vrsqrt14ps/d Vpd,Wpd (66),(ev) @@ -1082,6 +1084,10 @@ GrpTable: Grp21 7: ENDBR64 (F3),(010),(11B) | ENDBR32 (F3),(011),(11B) EndTable +GrpTable: Grp22 +0: TILERELEASE (!F3),(v1),(11B) +EndTable + # AMD's Prefetch Group GrpTable: GrpP 0: PREFETCH diff --git a/tools/arch/x86/lib/x86-opcode-map.txt b/tools/arch/x86/lib/x86-opcode-map.txt index ec31f5b60323..dbc5078ccafe 100644 --- a/tools/arch/x86/lib/x86-opcode-map.txt +++ b/tools/arch/x86/lib/x86-opcode-map.txt @@ -690,7 +690,9 @@ AVXcode: 2 45: vpsrlvd/q Vx,Hx,Wx (66),(v) 46: vpsravd Vx,Hx,Wx (66),(v) | vpsravd/q Vx,Hx,Wx (66),(evo) 47: vpsllvd/q Vx,Hx,Wx (66),(v) -# Skip 0x48-0x4b +# Skip 0x48 +49: Grp22 (1A) +# Skip 0x4a-0x4b 4c: vrcp14ps/d Vpd,Wpd (66),(ev) 4d: vrcp14ss/d Vsd,Hpd,Wsd (66),(ev) 4e: vrsqrt14ps/d Vpd,Wpd (66),(ev) @@ -1082,6 +1084,10 @@ GrpTable: Grp21 7: ENDBR64 (F3),(010),(11B) | ENDBR32 (F3),(011),(11B) EndTable +GrpTable: Grp22 +0: TILERELEASE (!F3),(v1),(11B) +EndTable + # AMD's Prefetch Group GrpTable: GrpP 0: PREFETCH -- 2.17.1