Received: by 2002:a05:6a10:1d13:0:0:0:0 with SMTP id pp19csp3043248pxb; Sun, 29 Aug 2021 11:26:42 -0700 (PDT) X-Google-Smtp-Source: ABdhPJztnJJhYxaKuvFv/kAyQynnKYy7c7tBFz13N80OPqtrwahOWeUyU2J1sRi8JbHNQxmO4tjz X-Received: by 2002:a50:9e41:: with SMTP id z59mr17959605ede.376.1630261602691; Sun, 29 Aug 2021 11:26:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630261602; cv=none; d=google.com; s=arc-20160816; b=snNjnt9PIn1Sp2FnXAjcH/K49FNkCKNml0j9yja2tCvUp7m2wOviia1poOjn91OYCm vXlqRa0ofiCtXORkbt4aG2S1eeAs/6XbQjR336LmmGP8c29Qc12z3kbdspys6cqI5THx +FGALzdzkhkTGxknriV1UojxqdAdIZwyLy3P6YQPLwM8NMpqIEoPWHn8I6kqBbYZoLI7 BIQTm8Wb5rFWV99/MsMZv6FNER8POF7o3UDD76o1ENIzWFh788YeiYnFe1jIxnh6lot+ YBHylGf+WqJ0ASCYi/HCfwg3S8G7u01QZRbqGib4GRjnqzv9+aktdbD1lvjRvlU/Bcgy X+vA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from; bh=ntchfA76YwdgfvT6s5A0mNAoTId5gfoKXD9yGNPMB+U=; b=tQILX1AxzohQ9Mma0tSvibZwg7CYDckkXsdMYwrWoBtdm5fkP2kyrqs54BZIqUQRl4 MJphMnT9N4BM+5ENp8XX74lTkSgQmJWre6hDQLVPHAtMF4Mr8Ndn9iJVKtwF2g4yWjPm 3IsVSGC/M3DYEWWqqfkgTX8XxDczCuK0SJOuxx99lxbaDryJkQnZLVZ/asMYZbHq/+mf MQTFYSYDdbmHm3tkKBKkfk2O8PDSwtTsH+xD5UbbhU58tfZeVaIArs21YC4QDfPh1hPt 5fCCr3/heFAG8bqGaY1tZfKEoteOfyY7AnZ3BgR7io6r8jnnOWZtrSr/UYyRJclrNhYr qHwQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n5si12690175edr.37.2021.08.29.11.26.15; Sun, 29 Aug 2021 11:26:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232927AbhH2SZo (ORCPT + 99 others); Sun, 29 Aug 2021 14:25:44 -0400 Received: from mga12.intel.com ([192.55.52.136]:63344 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230010AbhH2SZn (ORCPT ); Sun, 29 Aug 2021 14:25:43 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10091"; a="197736737" X-IronPort-AV: E=Sophos;i="5.84,361,1620716400"; d="scan'208";a="197736737" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Aug 2021 11:24:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.84,361,1620716400"; d="scan'208";a="445519073" Received: from coresw01.iind.intel.com ([10.106.46.194]) by orsmga002.jf.intel.com with ESMTP; 29 Aug 2021 11:24:44 -0700 From: rashmi.a@intel.com To: michal.simek@xilinx.com, ulf.hansson@linaro.org, linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kishon@ti.com, vkoul@kernel.org, andriy.shevchenko@linux.intel.com, linux-phy@lists.infradead.org Cc: mgross@linux.intel.com, kris.pan@linux.intel.com, furong.zhou@intel.com, mallikarjunappa.sangannavar@intel.com, adrian.hunter@intel.com, mahesh.r.vaidya@intel.com, nandhini.srikandan@intel.com, rashmi.a@intel.com Subject: [PATCH v2 0/4] Add support of eMMC PHY for Intel Thunder Bay Date: Sun, 29 Aug 2021 23:54:39 +0530 Message-Id: <20210829182443.30802-1-rashmi.a@intel.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rashmi A This patch set enables the support for eMMC PHY on the Intel Thunder Bay SoC. eMMC PHY is based on arasan phy. Patch 1 Adds arasan sdhci support for eMMC in Intel Thunder Bay. Patch 2 Adds arasan sdhci dt bindings. Patch 3 Holds the device tree binding documentation for eMMC PHY and listings of new files in MAINTAINERS file. Patch 4 Holds the eMMC PHY driver. Rashmi A (4): mmc: sdhci-of-arasan: Add intel Thunder Bay SOC support to the arasan eMMC driver dt-bindings: mmc: Add bindings for Intel Thunder Bay SoC dt-bindings: phy: intel: Add Thunder Bay eMMC PHY bindings phy: intel: Add Thunder Bay eMMC PHY support .../devicetree/bindings/mmc/arasan,sdhci.yaml | 25 + .../phy/intel,phy-thunderbay-emmc.yaml | 46 ++ MAINTAINERS | 7 + drivers/mmc/host/sdhci-of-arasan.c | 29 +- drivers/phy/intel/Kconfig | 10 + drivers/phy/intel/Makefile | 1 + drivers/phy/intel/phy-intel-thunderbay-emmc.c | 512 ++++++++++++++++++ 7 files changed, 629 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/phy/intel,phy-thunderbay-emmc.yaml create mode 100644 drivers/phy/intel/phy-intel-thunderbay-emmc.c -- 2.17.1