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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: analog.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MW4PR03MB6363.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: e1df2216-47f1-47a4-9c36-08d96bb3f438 X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Aug 2021 12:44:48.8383 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: eaa689b4-8f87-40e0-9c6f-7228de4d754a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: zlXtg8f7DwQECXMBQZek/3MBUlb8HUMF3Z1SO/w3uf/ga27BAFLbl8nyzsBwHayBf2tbAMoG9kbPB0rELWZpfA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR03MB2878 X-Proofpoint-ORIG-GUID: 5I0ha0KOmDsPQ2MiD4Be88jOMJwYxZ7r X-Proofpoint-GUID: 5I0ha0KOmDsPQ2MiD4Be88jOMJwYxZ7r X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-08-30_05,2021-08-30_01,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 malwarescore=0 suspectscore=0 phishscore=0 mlxlogscore=999 spamscore=0 lowpriorityscore=0 bulkscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2108300091 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Jonathan Cameron > Sent: Monday, August 30, 2021 12:37 PM > To: Miquel Raynal > Cc: Lars-Peter Clausen ; Thomas Petazzoni > ; linux-iio@vger.kernel.org; linux- > kernel@vger.kernel.org > Subject: Re: [PATCH 14/16] iio: adc: max1027: Consolidate the end of > conversion helper >=20 > On Wed, 18 Aug 2021 13:11:37 +0200 > Miquel Raynal wrote: >=20 > > Now that we have a dedicated handler for End Of Conversion > interrupts, > > let's create a second path: > > - Situation 1: we are using the external hardware trigger, a > conversion > > has been triggered and the ADC pushed the data to its FIFO, we > need to > > retrieve the data and push it to the IIO buffers. > > - Situation 2: we are not using the external hardware trigger, hence > we > > are likely waiting in a blocked thread waiting for this interrupt to > > happen: in this case we just wake up the waiting thread. > > > > Signed-off-by: Miquel Raynal > > --- > > drivers/iio/adc/max1027.c | 20 +++++++++++++++++--- > > 1 file changed, 17 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/iio/adc/max1027.c b/drivers/iio/adc/max1027.c > > index 8d86e77fb5db..8c5995ae59f2 100644 > > --- a/drivers/iio/adc/max1027.c > > +++ b/drivers/iio/adc/max1027.c > > @@ -235,6 +235,7 @@ struct max1027_state { > > struct iio_trigger *trig; > > __be16 *buffer; > > struct mutex lock; > > + bool data_rdy; > > bool cnvst_trigger; > > u8 reg ____cacheline_aligned; > > }; > > @@ -243,12 +244,22 @@ static > DECLARE_WAIT_QUEUE_HEAD(max1027_queue); > > > > static int max1027_wait_eoc(struct iio_dev *indio_dev) > > { > > + struct max1027_state *st =3D iio_priv(indio_dev); > > unsigned int conversion_time =3D > MAX1027_CONVERSION_UDELAY; > > + int ret; > > > > - if (indio_dev->active_scan_mask) > > - conversion_time *=3D hweight32(*indio_dev- > >active_scan_mask); > > + if (st->spi->irq) { > > + ret =3D > wait_event_interruptible_timeout(max1027_queue, > > + st->data_rdy, HZ / > 1000); > > + st->data_rdy =3D false; > > + if (ret =3D=3D -ERESTARTSYS) > > + return ret; > > + } else { > > + if (indio_dev->active_scan_mask) > > + conversion_time *=3D hweight32(*indio_dev- > >active_scan_mask); > > > > - usleep_range(conversion_time, conversion_time * 2); > > + usleep_range(conversion_time, conversion_time * 2); > > + } > > > > return 0; > > } > > @@ -481,6 +492,9 @@ static irqreturn_t > max1027_eoc_irq_handler(int irq, void *private) > > if (st->cnvst_trigger) { > > ret =3D max1027_read_scan(indio_dev); > > iio_trigger_notify_done(indio_dev->trig); > > + } else { > > + st->data_rdy =3D true; > > + wake_up(&max1027_queue); >=20 > I can't see why a queue is appropriate for this. Use a completion and > have > one per instance of the device. No need for the flag etc in that case as > complete() means we have had an interrupt. >=20 In the case that 'st-> cnvst_trigger' is not set but the spi IRQ is present, we will wait until we get 'wake_up()' called from here. I wonde= r if that is a good idea as the device own trigger is not being used. FWIW, I th= ink this sync logic is a bit confusing... I would still use the normal trigger infra= structure ('iio_trigger_generic_data_rdy_poll()') and use the 'cnvst_trigger' flag in= the trigger handler to manually start conversions + wait till eoc. But I might = be missing something though. Regarding this handler, I just realized that this is the hard IRQ handler w= hich might end up calling 'max1027_read_scan()' which in turn calls 'spi_read()'= . Am I missing something here? - Nuno S=E1