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Subject: Re: [PATCH v16 02/14] counter: stm32-timer-cnt: Provide defines for
 slave mode selection
To:     William Breathitt Gray <vilhelm.gray@gmail.com>, <jic23@kernel.org>
CC:     <linux-stm32@st-md-mailman.stormreply.com>,
        <kernel@pengutronix.de>, <a.fatoum@pengutronix.de>,
        <kamel.bouhara@bootlin.com>, <gwendal@chromium.org>,
        <alexandre.belloni@bootlin.com>, <david@lechnology.com>,
        <linux-iio@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-arm-kernel@lists.infradead.org>, <syednwaris@gmail.com>,
        <patrick.havelange@essensium.com>, <fabrice.gasnier@st.com>,
        <mcoquelin.stm32@gmail.com>, <alexandre.torgue@st.com>,
        <o.rempel@pengutronix.de>, <jarkko.nikula@linux.intel.com>
References: <cover.1630031207.git.vilhelm.gray@gmail.com>
 <ad3d9cd7af580d586316d368f74964cbc394f981.1630031207.git.vilhelm.gray@gmail.com>
From:   Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Message-ID: <ad245fd3-5751-08e6-3f3a-30522822f0af@foss.st.com>
Date:   Tue, 31 Aug 2021 15:40:37 +0200
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On 8/27/21 5:47 AM, William Breathitt Gray wrote:
> The STM32 timer permits configuration of the counter encoder mode via
> the slave mode control register (SMCR) slave mode selection (SMS) bits.
> This patch provides preprocessor defines for the supported encoder
> modes.
> 
> Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com>
> ---
>  drivers/counter/stm32-timer-cnt.c | 16 ++++++++--------
>  include/linux/mfd/stm32-timers.h  |  4 ++++
>  2 files changed, 12 insertions(+), 8 deletions(-)

Hi William,

You can add my:
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>

Thanks,
Fabrice

> 
> diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c
> index 3fb0debd7425..1fbc46f4ee66 100644
> --- a/drivers/counter/stm32-timer-cnt.c
> +++ b/drivers/counter/stm32-timer-cnt.c
> @@ -93,16 +93,16 @@ static int stm32_count_function_get(struct counter_device *counter,
>  	regmap_read(priv->regmap, TIM_SMCR, &smcr);
>  
>  	switch (smcr & TIM_SMCR_SMS) {
> -	case 0:
> +	case TIM_SMCR_SMS_SLAVE_MODE_DISABLED:
>  		*function = STM32_COUNT_SLAVE_MODE_DISABLED;
>  		return 0;
> -	case 1:
> +	case TIM_SMCR_SMS_ENCODER_MODE_1:
>  		*function = STM32_COUNT_ENCODER_MODE_1;
>  		return 0;
> -	case 2:
> +	case TIM_SMCR_SMS_ENCODER_MODE_2:
>  		*function = STM32_COUNT_ENCODER_MODE_2;
>  		return 0;
> -	case 3:
> +	case TIM_SMCR_SMS_ENCODER_MODE_3:
>  		*function = STM32_COUNT_ENCODER_MODE_3;
>  		return 0;
>  	default:
> @@ -119,16 +119,16 @@ static int stm32_count_function_set(struct counter_device *counter,
>  
>  	switch (function) {
>  	case STM32_COUNT_SLAVE_MODE_DISABLED:
> -		sms = 0;
> +		sms = TIM_SMCR_SMS_SLAVE_MODE_DISABLED;
>  		break;
>  	case STM32_COUNT_ENCODER_MODE_1:
> -		sms = 1;
> +		sms = TIM_SMCR_SMS_ENCODER_MODE_1;
>  		break;
>  	case STM32_COUNT_ENCODER_MODE_2:
> -		sms = 2;
> +		sms = TIM_SMCR_SMS_ENCODER_MODE_2;
>  		break;
>  	case STM32_COUNT_ENCODER_MODE_3:
> -		sms = 3;
> +		sms = TIM_SMCR_SMS_ENCODER_MODE_3;
>  		break;
>  	default:
>  		return -EINVAL;
> diff --git a/include/linux/mfd/stm32-timers.h b/include/linux/mfd/stm32-timers.h
> index f8db83aedb2b..5f5c43fd69dd 100644
> --- a/include/linux/mfd/stm32-timers.h
> +++ b/include/linux/mfd/stm32-timers.h
> @@ -82,6 +82,10 @@
>  #define MAX_TIM_ICPSC		0x3
>  #define TIM_CR2_MMS_SHIFT	4
>  #define TIM_CR2_MMS2_SHIFT	20
> +#define TIM_SMCR_SMS_SLAVE_MODE_DISABLED	0 /* counts on internal clock when CEN=1 */
> +#define TIM_SMCR_SMS_ENCODER_MODE_1		1 /* counts TI1FP1 edges, depending on TI2FP2 level */
> +#define TIM_SMCR_SMS_ENCODER_MODE_2		2 /* counts TI2FP2 edges, depending on TI1FP1 level */
> +#define TIM_SMCR_SMS_ENCODER_MODE_3		3 /* counts on both TI1FP1 and TI2FP2 edges */
>  #define TIM_SMCR_TS_SHIFT	4
>  #define TIM_BDTR_BKF_MASK	0xF
>  #define TIM_BDTR_BKF_SHIFT(x)	(16 + (x) * 4)
>