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Subject: Re: [PATCH v29 23/32] x86/cet/shstk: Add user-mode shadow stack
 support
To:     Borislav Petkov <bp@alien8.de>
Cc:     "Yu, Yu-cheng" <yu-cheng.yu@intel.com>, x86@kernel.org,
        "H. Peter Anvin" <hpa@zytor.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, linux-kernel@vger.kernel.org,
        linux-doc@vger.kernel.org, linux-mm@kvack.org,
        linux-arch@vger.kernel.org, linux-api@vger.kernel.org,
        Arnd Bergmann <arnd@arndb.de>,
        Andy Lutomirski <luto@kernel.org>,
        Balbir Singh <bsingharora@gmail.com>,
        Cyrill Gorcunov <gorcunov@gmail.com>,
        Dave Hansen <dave.hansen@linux.intel.com>,
        Eugene Syromiatnikov <esyr@redhat.com>,
        Florian Weimer <fweimer@redhat.com>,
        "H.J. Lu" <hjl.tools@gmail.com>, Jann Horn <jannh@google.com>,
        Jonathan Corbet <corbet@lwn.net>,
        Kees Cook <keescook@chromium.org>,
        Mike Kravetz <mike.kravetz@oracle.com>,
        Nadav Amit <nadav.amit@gmail.com>,
        Oleg Nesterov <oleg@redhat.com>, Pavel Machek <pavel@ucw.cz>,
        Peter Zijlstra <peterz@infradead.org>,
        Randy Dunlap <rdunlap@infradead.org>,
        "Ravi V. Shankar" <ravi.v.shankar@intel.com>,
        Dave Martin <Dave.Martin@arm.com>,
        Weijiang Yang <weijiang.yang@intel.com>,
        Pengfei Xu <pengfei.xu@intel.com>,
        Haitao Huang <haitao.huang@intel.com>,
        Rick P Edgecombe <rick.p.edgecombe@intel.com>
References: <20210820181201.31490-1-yu-cheng.yu@intel.com>
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From:   Dave Hansen <dave.hansen@intel.com>
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Message-ID: <7fa20642-4841-30b4-2ced-828f34a6d397@intel.com>
Date:   Wed, 1 Sep 2021 08:24:27 -0700
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On 9/1/21 6:00 AM, Borislav Petkov wrote:
>> So, this code takes the coward's way out: it *forces* TIF_NEED_FPU_LOAD
>> to be clear by making the registers live with fpregs_restore_userregs().
>>  That lets it just use WRMSR instead of dealing with the XSAVE buffer
>> directly.  If it didn't do this with the *WHOLE* set of user FPU state,
>> we'd need more fine-granted "NEED_*_LOAD" tracking than our one FPU bit.
>>
>> This is also *only* safe because the task is newly-exec()'d and the FPU
>> state was just reset.  Otherwise, we might have had to worry that the
>> non-PL3 SSPs have garbage or that non-SHSTK bits are set in MSR_IA32_U_CET.
>>
>> That said, after staring at it, I *think* this code is functionally
>> correct and OK performance-wise.
> Right, except that that is being done in
> setup_signal_shadow_stack()/restore_signal_shadow_stack() too, for the
> restore token.
> 
> Which means, a potential XRSTOR each time just for a single MSR. That
> means, twice per signal in the worst case.
> 
> Which means, shadow stack should be pretty noticeable in signal-heavy
> benchmarks...

Ahh, good point.  I totally missed the signal side.

Yu-cheng, it would probably be wise to take a look at where
TIF_NEED_FPU_LOAD is set in the signal paths.  I suspect the new shadow
stack code is clearing it pretty quickly.  That's not *necessarily* a
waste because it has to be XRSTOR'd somewhere before returning to
userspace.  But, it does impose an extra XSAVE/XRSTOR burden if the code
is preempted somewhere between
setup_signal_shadow_stack()/restore_signal_shadow_stack() and the return
to usersspace.

Some performance numbers would be nice.

Even nicer would be to make your code work without requiring
TIF_NEED_FPU_LOAD to be clear, or actively clearing it.