Received: by 2002:a05:6a10:1d13:0:0:0:0 with SMTP id pp19csp877382pxb; Wed, 1 Sep 2021 11:55:08 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwV1GQ/aLPTfKZ5bT8uVsCmlgHg66715ND0A1rhBAVCwJ5g8KTtj6bMuH/FhZKAxM5nYrrs X-Received: by 2002:a17:906:8cd:: with SMTP id o13mr1012945eje.341.1630522508038; Wed, 01 Sep 2021 11:55:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630522508; cv=none; d=google.com; s=arc-20160816; b=OVpt0qFTpN6SnZqEcvIPMaELLynd1SdjqMDwbEqWKDI1EpJvGN6TrPXoQ/5Ujyg8rR wO1Br+4SxJvC1xXx763EitqMI/42y6E+raJxsZGubj+KCvoBmzd4gQtOCRIx+/4eqKlN Nrg4G1t6YAMd1lZilpzcWko6B0zB6AbItFiouA4AzG7wD13ISd2hJ39kUpB82n+xVle4 2kTV0BQ0dIqCpYmB0MwfVN306/KXPpMuDB7JkkvfUyDfjFqeoYl/f8LYwO5C9ERpa2/1 NuJO2pPR74JRMJsqpChMAw91eM88vl6fSx83MOe3tSDj7qngNLO45BZQ0r/rcb1j9U78 Gy0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=IQufJFsX7MYBHoTtEVMiWOwsUzPzmfo36exq3/WgeyQ=; b=kfe1GfOj3RUyhV0KLTyQtIO/pL61AaHDK4MB+UfXQ1XUmgZwb27CzsvxIaGsmXjOv+ wKdGrdqBGik0WnZS2+H+Q3A2m9PPnHbl4ND0qRuCL8HWrfZSSPpecpb20tsWlfBQsure x0QJ1fkz+oGlL2PZy0v7D0Dz/ZLmnMNMU+MnpPuJDzsm2mKwZgoXjZFhEAhW4UqDdy0F +wE97HOmzZXIpGABAbG7cbFH/T1+k5GDTJhDVQVzj+b+ORbBJP9Btgrf+he4SViN8/3n LoSsI4L94o48oos1xBWO81AFqOOXvatB/lWr5UxFlTJohzGrjCTBw12OU7n3/V1Dz11c W8eA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=wGFdPhjH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f19si568845ejz.64.2021.09.01.11.54.45; Wed, 01 Sep 2021 11:55:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=wGFdPhjH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244885AbhIAMfA (ORCPT + 99 others); Wed, 1 Sep 2021 08:35:00 -0400 Received: from mail.kernel.org ([198.145.29.99]:33492 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244820AbhIAMdU (ORCPT ); Wed, 1 Sep 2021 08:33:20 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 96C7C610D2; Wed, 1 Sep 2021 12:31:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1630499512; bh=xGeeZpq2HAygFPk++Gk7ModHNahau+QWrL/yPLyjIIk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wGFdPhjHTP49kS3laur1ITZ2OYUJT/i5Fwt6mxUE9vBnX/0iAcdHZYeiCxqaghss0 ev00XpgS9/T9Zmzew0I1FvbVsFev1xRaC1RenC8XM3wv8KTxzDSAqtqX9bxXK8W7yy aIUvNpb/96aNg7u70itSAlU4UcIyfnNV7+RFk2EI= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Colin Ian King , "Peter Zijlstra (Intel)" , Ingo Molnar , Kan Liang , Sasha Levin Subject: [PATCH 5.4 27/48] perf/x86/intel/uncore: Fix integer overflow on 23 bit left shift of a u32 Date: Wed, 1 Sep 2021 14:28:17 +0200 Message-Id: <20210901122254.310509992@linuxfoundation.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210901122253.388326997@linuxfoundation.org> References: <20210901122253.388326997@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Colin Ian King [ Upstream commit 0b3a8738b76fe2087f7bc2bd59f4c78504c79180 ] The u32 variable pci_dword is being masked with 0x1fffffff and then left shifted 23 places. The shift is a u32 operation,so a value of 0x200 or more in pci_dword will overflow the u32 and only the bottow 32 bits are assigned to addr. I don't believe this was the original intent. Fix this by casting pci_dword to a resource_size_t to ensure no overflow occurs. Note that the mask and 12 bit left shift operation does not need this because the mask SNR_IMC_MMIO_MEM0_MASK and shift is always a 32 bit value. Fixes: ee49532b38dd ("perf/x86/intel/uncore: Add IMC uncore support for Snow Ridge") Addresses-Coverity: ("Unintentional integer overflow") Signed-off-by: Colin Ian King Signed-off-by: Peter Zijlstra (Intel) Signed-off-by: Ingo Molnar Reviewed-by: Kan Liang Link: https://lore.kernel.org/r/20210706114553.28249-1-colin.king@canonical.com Signed-off-by: Sasha Levin --- arch/x86/events/intel/uncore_snbep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c index 40751af62dd3..9096a1693942 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -4382,7 +4382,7 @@ static void snr_uncore_mmio_init_box(struct intel_uncore_box *box) return; pci_read_config_dword(pdev, SNR_IMC_MMIO_BASE_OFFSET, &pci_dword); - addr = (pci_dword & SNR_IMC_MMIO_BASE_MASK) << 23; + addr = ((resource_size_t)pci_dword & SNR_IMC_MMIO_BASE_MASK) << 23; pci_read_config_dword(pdev, SNR_IMC_MMIO_MEM0_OFFSET, &pci_dword); addr |= (pci_dword & SNR_IMC_MMIO_MEM0_MASK) << 12; -- 2.30.2