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[35.185.214.157]) by smtp.gmail.com with ESMTPSA id i7sm35421pjm.55.2021.09.01.16.15.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Sep 2021 16:15:42 -0700 (PDT) Date: Wed, 1 Sep 2021 23:15:39 +0000 From: Sean Christopherson To: Paolo Bonzini Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, isaku.yamahata@intel.com, David Matlack , peterx@redhat.com Subject: Re: [PATCH 08/16] KVM: MMU: change handle_abnormal_pfn() arguments to kvm_page_fault Message-ID: References: <20210807134936.3083984-1-pbonzini@redhat.com> <20210807134936.3083984-9-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210807134936.3083984-9-pbonzini@redhat.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Aug 07, 2021, Paolo Bonzini wrote: > Pass struct kvm_page_fault to handle_abnormal_pfn() instead of > extracting the arguments from the struct. > > Suggested-by: Isaku Yamahata > Signed-off-by: Paolo Bonzini > --- > arch/x86/kvm/mmu/mmu.c | 17 ++++++++--------- > arch/x86/kvm/mmu/paging_tmpl.h | 2 +- > 2 files changed, 9 insertions(+), 10 deletions(-) > > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c > index a6366f1c4197..cec59ac2e1cd 100644 > --- a/arch/x86/kvm/mmu/mmu.c > +++ b/arch/x86/kvm/mmu/mmu.c > @@ -3024,18 +3024,18 @@ static int kvm_handle_bad_page(struct kvm_vcpu *vcpu, gfn_t gfn, kvm_pfn_t pfn) > return -EFAULT; > } > > -static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, gva_t gva, gfn_t gfn, > - kvm_pfn_t pfn, unsigned int access, > - int *ret_val) > +static bool handle_abnormal_pfn(struct kvm_vcpu *vcpu, struct kvm_page_fault *fault, > + unsigned int access, int *ret_val) > { > /* The pfn is invalid, report the error! */ > - if (unlikely(is_error_pfn(pfn))) { > - *ret_val = kvm_handle_bad_page(vcpu, gfn, pfn); > + if (unlikely(is_error_pfn(fault->pfn))) { > + *ret_val = kvm_handle_bad_page(vcpu, fault->gfn, fault->pfn); > return true; > } > > - if (unlikely(is_noslot_pfn(pfn))) { > - vcpu_cache_mmio_info(vcpu, gva, gfn, > + if (unlikely(is_noslot_pfn(fault->pfn))) { > + gva_t gva = fault->is_tdp ? 0 : fault->addr; Checkpatch wants a newline. I'm also surprised you didn't abuse bitwise math: gva_t gva = fault->addr & ((u64)fault->is_tdp - 1); I am _not_ suggesting you actually do that ;-) > + vcpu_cache_mmio_info(vcpu, gva, fault->gfn, > access & shadow_mmio_access_mask); > /* > * If MMIO caching is disabled, emulate immediately without