Received: by 2002:a05:6a10:1d13:0:0:0:0 with SMTP id pp19csp232556pxb; Thu, 2 Sep 2021 02:59:10 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwYRevXXlFvBh18soUcZfuJcUkuf37xLI08Iw0lzAieqU0nD4IFHX3jljEwOxvKApq4IW1m X-Received: by 2002:a05:6638:2284:: with SMTP id y4mr2126793jas.75.1630576750108; Thu, 02 Sep 2021 02:59:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630576750; cv=none; d=google.com; s=arc-20160816; b=JOYm+6+u6PiuDMX/HL6DJxgmrFjqLzfB2kiVHZrN5I+t6icgHnl2eribasT+IzZUcA 6Pik2ewpL8H36eX2BnfORMRIJAwDrUVmObzyiDygJGs2EMxGUv1xfufMKoBoXdBGgaUR zhJeCsUlQL7uxsMcwkWbPAuTZP7SQai9SLC0ZqNkXFtVTlAaHrusDtgRuSpPDO+/bTg7 54DyHi3kHxrCpZej8AaqAheYlVNBUqeDou+YxPykDTYTSi82x3ozYJI9iGeB1BLI5xvI DqEk7rJ67MEHwsMZNXGZZI+7Y65bpTxMKXZUcKJoTACNJgb65dVYC5ruhmwOapYRRWY/ xbaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=RsTbFOP9AWRL7FOnOl3oPS9c/gPNYxmzrXVJj2eSnME=; b=qb0CCO1ebUdO0IBdr7OMjJ51NHYeG5fsO8qrmJ4XwOG+0sf2Y1oaLaT0Xk1RNTwejZ lsfyCK/GDGMQY5DmzV/ifDoqrwbdPiI0vqd3bq8WSUbYs9Md+6M0LxICSRD+/VXJN4Ed lnuPDzEgCM/NpVIMYSToI/W0OjfdwlZlZmhdopNnGy28IbrcTYl9ZMemRLh4pld8UBOo kBZBRDBRluazV4g57y/qSLVhbnDqWPNAyTQ2DCjFHf8cb+0xXqjnWdfVlD4vgk5MAJ/C HNmE8zTIKOyGe52CiBnPIm/P0BUYr3TnBDlQFJMLXAHq34RgwTXcOnm2eZ5s7gsrgexk UFTA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id k1si1664176ilo.14.2021.09.02.02.58.58; Thu, 02 Sep 2021 02:59:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242520AbhIBHUz (ORCPT + 99 others); Thu, 2 Sep 2021 03:20:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34418 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233363AbhIBHUz (ORCPT ); Thu, 2 Sep 2021 03:20:55 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F575C061575 for ; Thu, 2 Sep 2021 00:19:57 -0700 (PDT) Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mLh0r-0000Rt-RW; Thu, 02 Sep 2021 09:19:53 +0200 Received: from ore by dude.hi.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1mLh0r-0007Ub-2o; Thu, 02 Sep 2021 09:19:53 +0200 From: Oleksij Rempel To: Thomas Bogendoerfer , Rob Herring Cc: Oleksij Rempel , Pengutronix Kernel Team , linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Ralf Baechle , Paul Burton Subject: [PATCH v1] MIPS: Malta: fix alignment of the devicetree buffer Date: Thu, 2 Sep 2021 09:19:51 +0200 Message-Id: <20210902071951.28722-1-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Starting with following patch MIPS Malta is not able to boot: | commit 79edff12060fe7772af08607eff50c0e2486c5ba | Author: Rob Herring | scripts/dtc: Update to upstream version v1.6.0-51-g183df9e9c2b9 The reason is the alignment test added to the fdt_ro_probe_(). To fix this issue, we need to make sure that fdt_buf is aligned. Since the dtc patch was designed to uncover potential issue, I handle initial MIPS Malta patch as initial bug. Fixes: e81a8c7dabac ("MIPS: Malta: Setup RAM regions via DT") Signed-off-by: Oleksij Rempel --- arch/mips/mti-malta/malta-dtshim.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/mti-malta/malta-dtshim.c b/arch/mips/mti-malta/malta-dtshim.c index 0ddf03df6268..f451268f6c38 100644 --- a/arch/mips/mti-malta/malta-dtshim.c +++ b/arch/mips/mti-malta/malta-dtshim.c @@ -22,7 +22,7 @@ #define ROCIT_CONFIG_GEN1_MEMMAP_SHIFT 8 #define ROCIT_CONFIG_GEN1_MEMMAP_MASK (0xf << 8) -static unsigned char fdt_buf[16 << 10] __initdata; +static unsigned char fdt_buf[16 << 10] __initdata __aligned(8); /* determined physical memory size, not overridden by command line args */ extern unsigned long physical_memsize; -- 2.30.2