Received: by 2002:a05:6a10:eb17:0:0:0:0 with SMTP id hx23csp132427pxb; Thu, 2 Sep 2021 21:34:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzPZFLCbUjC74bNtS1wrmx2qvRqoCAOKZtWEvWaRn4azQWl3HcfT5o9XRp5po6cMuWEpXqP X-Received: by 2002:a17:906:8cd:: with SMTP id o13mr1922762eje.341.1630643653482; Thu, 02 Sep 2021 21:34:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630643653; cv=none; d=google.com; s=arc-20160816; b=IDDIZAd5L8isb5wFWTjydVUJKld2PwMl8rscKX6vw2FJjXq7kU/dNWjEKg3MDaBOzz EhM5V1uPzR3w2BUEg+ABpfPysYBjvfsUPWEg3ij7zrhk1lFI8kvfllB+PwdoTWae3ja4 ngi40B/CHgELw+QB5pGDW4NBwL4vQFEhX+jmEBPQDWX236HM3+j8V/ZSmSGd2Y2F8IbC s4ZzRQdvM5LVQ16Fag+h3F/H8vYEbl6qUi/kF3l+NBz3l9UW5icuWSmKXposhpP2M5uq nFWtD5kNzJ4w8ms2MvBaNdP9Vqtz/P49k9wvA2MSOeZsBONO2Fh5x6Lc+aF9sx/qFh+Q CQPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from; bh=GAYJrlHrg6NYXULEPi4iQu67bC8GZ/yK7qST8EDF+34=; b=AWZyWaONaDY3byzzmceAYFd6qTwMJnJO4d/f0nM/b54awVOG2GIIUQTN95hs7qUIeT 9BXCpuRZ0AbqU0Tf8qitpc2699AqlWupfZdNUdR2bqf1N7QF6r68nnpnzTvFizgUkgyg mEC8MPGKGzS3NzBYxAvYHRiqEAnLFJ80WpaHQhm1ROf5FWtDtuR3s5K1DEgKfI/cUukq lB/vQdsuF3WgV+WPAYIWe5kuRAWXjbo02wN2relhBxWzUwoa+Y63dkidbMIGtpMKGX8d s9JWC3FJZ9bjJgicdxySFd5I4pC/ijkLTDFRi9ZvyRvJvuL8ra/mPDgCEy4JQzW93n5B Kr1A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r21si4493896ejo.665.2021.09.02.21.33.49; Thu, 02 Sep 2021 21:34:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233540AbhICEaz (ORCPT + 99 others); Fri, 3 Sep 2021 00:30:55 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:43992 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232089AbhICEal (ORCPT ); Fri, 3 Sep 2021 00:30:41 -0400 Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 02 Sep 2021 21:29:38 -0700 X-QCInternal: smtphost Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 02 Sep 2021 21:29:36 -0700 X-QCInternal: smtphost Received: from rajpat-linux.qualcomm.com ([10.206.21.0]) by ironmsg01-blr.qualcomm.com with ESMTP; 03 Sep 2021 09:59:15 +0530 Received: by rajpat-linux.qualcomm.com (Postfix, from userid 2344945) id 42A5621242; Fri, 3 Sep 2021 09:59:14 +0530 (IST) From: Rajesh Patil To: Andy Gross , Bjorn Andersson , Rob Herring Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, rnayak@codeaurora.org, saiprakash.ranjan@codeaurora.org, msavaliy@qti.qualcomm.com, skakit@codeaurora.org, sboyd@kernel.org, mka@chromium.org, dianders@chromium.org, Rajesh Patil Subject: [PATCH V7 2/7] arm64: dts: sc7280: Configure SPI-NOR FLASH for sc7280-idp Date: Fri, 3 Sep 2021 09:58:55 +0530 Message-Id: <1630643340-10373-3-git-send-email-rajpat@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630643340-10373-1-git-send-email-rajpat@codeaurora.org> References: <1630643340-10373-1-git-send-email-rajpat@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add spi-nor flash node and pinctrl configurations for the SC7280 IDP. Signed-off-by: Rajesh Patil Reviewed-by: Matthias Kaehlcke Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi index 371a2a9..c41c2d0 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi @@ -207,6 +207,20 @@ }; }; +&qspi { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data01>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <37500000>; + spi-tx-bus-width = <2>; + spi-rx-bus-width = <2>; + }; +}; + &qupv3_id_0 { status = "okay"; }; @@ -284,6 +298,19 @@ /* PINCTRL - additions to nodes defined in sc7280.dtsi */ +&qspi_cs0 { + bias-disable; +}; + +&qspi_clk { + bias-disable; +}; + +&qspi_data01 { + /* High-Z when no transfers; nice to park the lines */ + bias-pull-up; +}; + &qup_uart5_default { tx { pins = "gpio46"; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation