From: David Howells <dhowells@redhat.com>
In-Reply-To: <1165525597.4698.46.camel@mulgrave.il.steeleye.com> 
References: <1165525597.4698.46.camel@mulgrave.il.steeleye.com>  <20061207085409.228016a2.akpm@osdl.org> <20061207153138.28408.94099.stgit@warthog.cambridge.redhat.com> <20061207153143.28408.7274.stgit@warthog.cambridge.redhat.com> <639.1165521999@redhat.com> 
To: James Bottomley <James.Bottomley@SteelEye.com>
Cc: David Howells <dhowells@redhat.com>, Andrew Morton <akpm@osdl.org>,
       torvalds@osdl.org, davem@davemloft.com, wli@holomorphy.com,
       matthew@wil.cx, linux-kernel@vger.kernel.org,
       linux-arch@vger.kernel.org
Subject: Re: [PATCH 3/3] WorkStruct: Use direct assignment rather than cmpxchg() 
Date: Thu, 07 Dec 2006 21:16:03 +0000
Message-ID: <10660.1165526163@redhat.com>
Sender: linux-kernel-owner@vger.kernel.org
Content-Length: 841
Lines: 19

James Bottomley <James.Bottomley@SteelEye.com> wrote:

> That we'd have to put a conditional jump in there is an incorrect
> assumption on risc machines.

I didn't say we would *have* to put a conditional jump in there.  But I don't
know that I it can be avoided on all archs.

I don't know that sparc32 can do conditional instructions for example.  If we
force this assumption it becomes a potential limitation on the archs we can
support.  OTOH, it may be that every arch that supports SMP and has to emulate
bitops with spinlocks also supports conditional stores; but I don't know that.

David
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