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[23.128.96.18]) by mx.google.com with ESMTP id r4si5452496ilb.106.2021.09.06.01.51.17; Mon, 06 Sep 2021 01:51:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@mg.codeaurora.org header.s=smtp header.b=Q1AHuuEL; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240963AbhIFI0R (ORCPT + 99 others); Mon, 6 Sep 2021 04:26:17 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:58632 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240927AbhIFI0M (ORCPT ); Mon, 6 Sep 2021 04:26:12 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1630916708; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=d+nW5BoyI7Dy4vUSUAQ4mQrWIW8wnJz3wMLhl5Rvb5Y=; b=Q1AHuuELFPQGAHo9lukdYCtdJ/N9HbTIQIDZs/u/HjBTh1/5d1W4hPWNvrITgE5JpuOtrc5i ofP1KEV6f37/mmH1O0jvfHP7KMhaEzFD9Di5zzo6AIJptqUPqHl7q7BUBh6WY+9WaCutaebM K52bYCgLgbLvA+WM99zU57kRa4o= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI0MWYwYSIsICJsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n02.prod.us-east-1.postgun.com with SMTP id 6135d05f1567234b8c73b679 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Mon, 06 Sep 2021 08:25:03 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 454CFC4361C; Mon, 6 Sep 2021 08:25:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-caf-mail-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=ALL_TRUSTED,BAYES_00,SPF_FAIL autolearn=no autolearn_force=no version=3.4.0 Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 95613C43460; Mon, 6 Sep 2021 08:24:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.codeaurora.org 95613C43460 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v6 09/13] arm64: dts: qcom: sm8250: Use QMP property to control load state Date: Mon, 6 Sep 2021 13:53:53 +0530 Message-Id: <1630916637-4278-10-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> References: <1630916637-4278-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SM8250 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 8c15d9fed08f..2796b27f7c04 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include @@ -2088,13 +2087,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, - <&rpmhpd SM8250_LCX>, + power-domains = <&rpmhpd SM8250_LCX>, <&rpmhpd SM8250_LMX>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&slpi_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_slpi_out 0>; qcom,smem-state-names = "stop"; @@ -2154,12 +2154,12 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, - <&rpmhpd SM8250_CX>; - power-domain-names = "load_state", "cx"; + power-domains = <&rpmhpd SM8250_CX>; memory-region = <&cdsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_cdsp_out 0>; qcom,smem-state-names = "stop"; @@ -2907,7 +2907,6 @@ IPCC_MPROC_SIGNAL_GLINK_QMP>; #clock-cells = <0>; - #power-domain-cells = <1>; }; spmi_bus: spmi@c440000 { @@ -3824,13 +3823,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, - <&rpmhpd SM8250_LCX>, + power-domains = <&rpmhpd SM8250_LCX>, <&rpmhpd SM8250_LMX>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&adsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; qcom,smem-state-names = "stop"; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project