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[23.128.96.18]) by mx.google.com with ESMTP id s20si11306548ioa.93.2021.09.06.17.21.28; Mon, 06 Sep 2021 17:21:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=AM3AUOWW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232494AbhIGAMa (ORCPT + 99 others); Mon, 6 Sep 2021 20:12:30 -0400 Received: from mail.kernel.org ([198.145.29.99]:50620 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230038AbhIGAMa (ORCPT ); Mon, 6 Sep 2021 20:12:30 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id D70A3610A3; Tue, 7 Sep 2021 00:11:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1630973484; bh=ifuFv3gkwVp/7X92auvTBV/kMkrnWgnIGVHcpN8lm0I=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=AM3AUOWWKR28dFKWdTcf/89GeoJVjrNAtBqiyFOtqiB409ug0JnZmbUcPvJ7xhYUd QZDE4EudShOca7/OYAMpDzIt9lGCn21USSPAPsP6DSvZxIl3C2d4x0AJMDe3+1AZKk Zl7ywAr3Yi89qXKFezX/+6uoKa7btOLQfU0UPeFqmkYo0mXvL3jXb8Csu3lPiHtRjp AcJWCTCqASGDC1KiBIScIbP4jtggGOZaCLPc8t3bHsE5GwttxhYAFzIxT1htE77Ezv lwIUIy7uAjcc2kei2CKz5n2k6zNh0J+ib+kn2U/FTfyVfqYWrLkWZPh9MxAkB2CCBT y3lKhC9ZXZTXQ== Received: by mail-ej1-f43.google.com with SMTP id t19so16199307ejr.8; Mon, 06 Sep 2021 17:11:24 -0700 (PDT) X-Gm-Message-State: AOAM531hcNKKQpD4as62q2eqIcMk8k7HsAW2lS59PPhrjt4ULphkpBiZ 1r9B8IUoHaQK7v9FzF3oDVaNnc1v5vgwOMeSig== X-Received: by 2002:a17:906:26c4:: with SMTP id u4mr15571504ejc.511.1630973483408; Mon, 06 Sep 2021 17:11:23 -0700 (PDT) MIME-Version: 1.0 References: <20210824100027.25989-1-moudy.ho@mediatek.com> <20210824100027.25989-4-moudy.ho@mediatek.com> In-Reply-To: <20210824100027.25989-4-moudy.ho@mediatek.com> From: Chun-Kuang Hu Date: Tue, 7 Sep 2021 08:11:12 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v7 3/5] dt-binding: mt8183: Add Mediatek MDP3 dt-bindings To: Moudy Ho Cc: Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Hans Verkuil , Jernej Skrabec , Maoguang Meng , daoyuan huang , Ping-Hsun Wu , Geert Uytterhoeven , Rob Landley , Laurent Pinchart , Linux Media Mailing List , DTML , Linux ARM , "moderated list:ARM/Mediatek SoC support" , linux-kernel , Tomasz Figa , Nicolas Boichat , Alexandre Courbot , Pi-Hsun Shih , menghui.lin@mediatek.com, =?UTF-8?B?U2ogSHVhbmcgKOm7g+S/oeeSiyk=?= , ben.lok@mediatek.com, randy.wu@mediatek.com, srv_heupstream , Hsin-Yi Wang Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Moudy: Moudy Ho =E6=96=BC 2021=E5=B9=B48=E6=9C=8824=E6=97= =A5 =E9=80=B1=E4=BA=8C =E4=B8=8B=E5=8D=886:02=E5=AF=AB=E9=81=93=EF=BC=9A > > This patch adds DT binding document for Media Data Path 3 (MDP3) > a unit in multimedia system used for scaling and color format convert. > > Signed-off-by: Moudy Ho > --- > .../bindings/media/mediatek,mdp3-ccorr.yaml | 57 +++++ > .../bindings/media/mediatek,mdp3-rdma.yaml | 207 ++++++++++++++++++ > .../bindings/media/mediatek,mdp3-rsz.yaml | 65 ++++++ > .../bindings/media/mediatek,mdp3-wdma.yaml | 71 ++++++ > .../bindings/media/mediatek,mdp3-wrot.yaml | 71 ++++++ > 5 files changed, 471 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3= -ccorr.yaml I've compared ccorr driver in display [1] and ccorr in mdp [2], both are similar. So I would like both binding document are placed together. In display folder? In mdp folder? In SoC folder? I've no idea which one is better. At lease put together. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree= /drivers/gpu/drm/mediatek/mtk_disp_ccorr.c?h=3Dv5.14 [2] https://patchwork.kernel.org/project/linux-mediatek/patch/2021082410002= 7.25989-6-moudy.ho@mediatek.com/ Regards, Chun-Kuang. > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3= -rdma.yaml > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3= -rsz.yaml > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3= -wdma.yaml > create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3= -wrot.yaml > > diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.= yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml > new file mode 100644 > index 000000000000..59fd68b46022 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-ccorr.yaml > @@ -0,0 +1,57 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/media/mediatek,mdp3-ccorr.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek Media Data Path 3 CCORR Device Tree Bindings > + > +maintainers: > + - Daoyuan Huang > + - Moudy Ho > + > +description: | > + One of Media Data Path 3 (MDP3) components used to do color correction= with 3X3 matrix. > + > +properties: > + compatible: > + items: > + - enum: > + - mediatek,mt8183-mdp3-ccorr > + > + mediatek,mdp3-id: > + $ref: /schemas/types.yaml#/definitions/uint32 > + maxItems: 1 > + description: | > + HW index to distinguish same functionality modules. > + > + reg: > + description: | > + Physical base address and length of the function block > + register space, the number aligns with the component > + and its own subcomponent. > + > + mediatek,gce-client-reg: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + description: | > + sub-system id corresponding to the global command engine (GCE) > + register address. > + $ref: /schemas/mailbox/mtk-gce.txt > + > + clocks: > + minItems: 1 > + > +additionalProperties: false > + > +examples: > + - | > + #include > + #include > + > + mdp3_ccorr: mdp3_ccorr@1401c000 { > + compatible =3D "mediatek,mt8183-mdp3-ccorr"; > + mediatek,mdp3-id =3D <0>; > + reg =3D <0x1401c000 0x1000>; > + mediatek,gce-client-reg =3D <&gce SUBSYS_1401XXXX 0xc000 0x1000>; > + clocks =3D <&mmsys CLK_MM_MDP_CCORR>; > + };