Received: by 2002:a05:6a10:eb17:0:0:0:0 with SMTP id hx23csp3574909pxb; Tue, 7 Sep 2021 02:53:32 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw3ZEFThCtLaJ+lKYdDBZqpw6IyziT5qpfI5QCGOj1FvmFCBhKBi/dDuTSxM0W6ZeiofBLO X-Received: by 2002:a17:907:3e05:: with SMTP id hp5mr17537923ejc.527.1631008412445; Tue, 07 Sep 2021 02:53:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631008412; cv=none; d=google.com; s=arc-20160816; b=GpcSU0SrYaoBcrlJYezpkHNXnXq7MDTH50TPG/nItp4j7Q1Ws5kOklSt13VF1jde4C cThr0GlmKLruI95nOda1KtG8bAdTyPKwq9rVJNzp2AwD8J+Dyo+v06c8pNSJfg6VSl7J lRmfQo39mwHQmUCorO3PSOyXDprnCowLIcp0mJlEhiuNDRcD4q7Jlq8EzrPpcs0a+46F wZQFYvt8jJ9NHKep2PDbBIXBQZxd6BBZTr89ejZKdx4IZerDa7n4CS5ptcDZuKdEqawy aM3HM3lXVl2/622qkfVzoRb8umcmpenY98WTt6n/g4067MKwB2tI5KG8EUkqnV2voMz9 FM7w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:content-language :in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject; bh=juFiUoLb5Yz7bNb2PFCV+dFj2l9HHbXfaernqMH9kIg=; b=CDGRnfh7AUTsTOGnSLrXR7P2C8cJBXCMe294YFN1m8HZvAvUzbKu7TmNG8Pc1MDctV qhY/JiixQWCqQi++jVELynjSN2yNAIZ9hTu3TM7zYqlnVcMkvx6hwOTX4l0WRZDVy13x svgpvvcd3Q8mC+H1okWxeYIRaqcAh2+ustpdrRMcsVJdr27G8oO0iNQTh6OcWEe5b2YI DJ6jlkCB/fF8Gav0wDyvtbB5eLGvVBJh1SBI8XHsA9zADw8wdkyk36lHlIxjEyFNlYJF G3jXLsms6WlBFnOXmuiwyPeueHp0Io0er0cl2VDbOyeckzvwISvKKtMdLVMWJmntx1Da hhug== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id b1si10568943edr.458.2021.09.07.02.53.09; Tue, 07 Sep 2021 02:53:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241945AbhIGJoT (ORCPT + 99 others); Tue, 7 Sep 2021 05:44:19 -0400 Received: from foss.arm.com ([217.140.110.172]:33852 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242700AbhIGJoS (ORCPT ); Tue, 7 Sep 2021 05:44:18 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 995D131B; Tue, 7 Sep 2021 02:43:12 -0700 (PDT) Received: from [10.57.15.112] (unknown [10.57.15.112]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7B47C3F766; Tue, 7 Sep 2021 02:43:11 -0700 (PDT) Subject: Re: [question] Assign multiple devices from different SMMUs to a arm_smmu_domain To: Kunkun Jiang , Will Deacon , Linux IOMMU , open list Cc: wanghaibin.wang@huawei.com, Zenghui Yu , Keqian Zhu References: From: Robin Murphy Message-ID: <202f32cd-8036-563e-028b-781b999766be@arm.com> Date: Tue, 7 Sep 2021 10:43:05 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2021-09-07 08:41, Kunkun Jiang wrote: > Hi all, > > I am working on VFIO DMA dirty pages tracking based on ARM SMMU HTTU, > and have done a lot of testing.In the test, I found a problem that > greatly affects > performance of VFIO DMA dirty pages tracking. > > According to the current arm-smmu-v3 driver, multiple VFIO pass-through > device comes from different SMMUs will be assigned to different > arm_smmu_domain. It will create page table for each arm_smmu_domain, > even though these page tables are exactly the same. Bacause dirty pages > tracking needs to traverse the page table, multiple page tables will make > performance worse. > > I learned the ARM SMMUv3 spec and had some exchanges with my colleagues > who work on SMMU hardware. I did not find the restriction that multiple > SMMUs cannot share the same page table. We migth be able to do this like > x86 IOMMU. If I have missed something, please point it out. Sure, it's not impossible, there are just a lot of fiddly considerations, mostly around how to handle SMMU instances with different capabilities. We haven't had a strong need to support this case so far, so we've simply been avoiding all that complexity. Robin. > Looking forward to your suggestions.???? > > Thanks, > Kunkun Jiang >