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Wysocki" , Sanjay R Mehta , Nehal Bakulchandra Shah , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, patches@opensource.cirrus.com Subject: Re: [PATCH 03/10] spi: Add flag for no TX after a RX in the same Chip Select Message-ID: <20210908123734.GF4112@sirena.org.uk> References: <20210908113450.788452-1-tanureal@opensource.cirrus.com> <20210908113450.788452-4-tanureal@opensource.cirrus.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="gMR3gsNFwZpnI/Ts" Content-Disposition: inline In-Reply-To: <20210908113450.788452-4-tanureal@opensource.cirrus.com> X-Cookie: Should I do my BOBBIE VINTON medley? User-Agent: Mutt/1.10.1 (2018-07-13) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --gMR3gsNFwZpnI/Ts Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Wed, Sep 08, 2021 at 12:34:44PM +0100, Lucas Tanure wrote: > Some controllers can't write to the bus after a read without > releasing the chip select, so add flag and a check in spi core Nothing you've added ever reads this flag and I'm not sure what anything would be able to constructively do with it so why add the flag? I don't understand what the use case is. --gMR3gsNFwZpnI/Ts Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmE4ro0ACgkQJNaLcl1U h9DOvQf/clMHHKqPoQr5y7MSb07txZsOnUjbvRf5oUZMsxb6Q3P2g3/fAz4thzpE L2w+B9OD3BMO4gW63I1iUI2GmN4gF0EpDv2zSPeGy28FHkTP/Ygo/lQFUxbVVlhw ep0pN/syPsQ9DoHGIxxv90usLPhq0bFxsSvG6IzFOjPT9NzO8PsyWi4PLHs6+Dw0 ktPSzH3mICPDui45wRw/jWxpLOJu+DU4UGiD+G7tXOcSl2D1MOZ3OFmKen3yAEw9 rIgC6AzUbtQPi5aH1ccCnnIt3k4H2KDLyXdTHsV+I71z/3vGZKGr9jab2z644Dkj nno3DG+ygyAgIHEUcMs8nYCYoc8r4Q== =Bkgx -----END PGP SIGNATURE----- --gMR3gsNFwZpnI/Ts--