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Wysocki" , Viresh Kumar , Shuah Khan , "Borislav Petkov" , Ingo Molnar , CC: Deepak Sharma , Alex Deucher , Mario Limonciello , Nathan Fontenot , Jinzhou Su , Xiaojian Du , , , Huang Rui Subject: [PATCH 01/19] x86/cpufreatures: add AMD CPPC extension feature flag Date: Wed, 8 Sep 2021 22:59:43 +0800 Message-ID: <20210908150001.3702552-2-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210908150001.3702552-1-ray.huang@amd.com> References: <20210908150001.3702552-1-ray.huang@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: f8407e99-1bb0-4470-3212-08d972d9749c X-MS-TrafficTypeDiagnostic: BL1PR12MB5143: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:1079; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: sYpfS/yh6Y0C13zxJKxTya3BBkte30C0phvrBlssQs3XK6y5+t+srMGiXsHxYsimEXnVRbHQfU5kpB0fmf3rAFoX/WfWuLezTypLQc59XDntKBreZN5tfPLP2MFzCNwQ0rGwz54AJyxgOyDEK+zLFeY5QSgJ6EKIeM0tQXAQk01hu0RwwDZTDI7SD9Sm0DeeMbwd9MV/8DUskJtyDm02sh0HcCy1drlhUS4vru4SFh4PcMDuV9o2QisKTD+Yo+J8v6PYi+I42gjrkQMCX821j386pqB3eQql2EgKgEJPlUMzk9fjP2bj/1ZovyFzt/gvL0Vr0dsBncyEPI8qUYZW7fx0RxOWEeEKSo3CSHNyZAyepldYy9N3XveuOJejadUDJxc1lUDCFgw1ntD1DCH9TIhrnUTnnM7nnGIZ1gMuzzzuc9qyOESHj1ZcSUj/8LR0n2uIiUUVj+nbpBzSjfszL0MxSUZUX9VukFgTDNQa05osVaeBAfHzBkF9N2X0m0s1Ur/OJJOt7DqeoNMQ5z4TWcj5TOMA/HGSuwpHz+WQt8M5VqJnM/6YYWFFeZJh46hO+RQcCYLQqPNhMQpe6m70dHBKEgPZ6X6X8lndFAFhy/imzjt+1q0lJjOfde3qJ5dMwNI1xPUDML0rwlsU58ZoBEM9FZEFsNG9u9/0BHca0lx63dLiQQ2H6WQnAIK/yC/3emm10UYT7JnzBFJLQyso/Vt23vOfPSF2zPRflKCVjAI= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(39860400002)(136003)(346002)(396003)(376002)(36840700001)(46966006)(2906002)(1076003)(54906003)(8936002)(110136005)(356005)(186003)(36756003)(86362001)(6666004)(26005)(316002)(16526019)(4326008)(81166007)(7696005)(4744005)(5660300002)(70206006)(2616005)(8676002)(82310400003)(47076005)(426003)(336012)(478600001)(36860700001)(82740400003)(70586007)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Sep 2021 15:00:53.7891 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f8407e99-1bb0-4470-3212-08d972d9749c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT011.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5143 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add Collaborative Processor Performance Control Extension feature flag for AMD processors. Signed-off-by: Huang Rui --- arch/x86/include/asm/cpufeatures.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index d0ce5cfd3ac1..f7aea50e3371 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -313,6 +313,7 @@ #define X86_FEATURE_AMD_SSBD (13*32+24) /* "" Speculative Store Bypass Disable */ #define X86_FEATURE_VIRT_SSBD (13*32+25) /* Virtualized Speculative Store Bypass Disable */ #define X86_FEATURE_AMD_SSB_NO (13*32+26) /* "" Speculative Store Bypass is fixed in hardware. */ +#define X86_FEATURE_AMD_CPPC_EXT (13*32+27) /* Collaborative Processor Performance Control Extension */ /* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */ #define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */ -- 2.25.1